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Mechanisms for cooperative shared memory

Published: 01 May 1993 Publication History

Abstract

This paper explores the complexity of implementing directory protocols by examining their mechanisms primitive operations on directories, caches, and network interfaces. We compare the following protocols: Dir1B, Dir4B, Dir4NB, DirnNB[2], Dir1SW[9] and an improved version of Dir1SW (Dir1SW+). The comparison shows that the mechanisms and mechanism sequencing of Dir1SW and Dir1SW+ are simpler than those for other protocols.
We also compare protocol performance by running eight benchmarks on 32 processor systems. Simulations show that Dir1SW+s performance is comparable to more complex directory protocols. The significant disparity in hardware complexity and the small difference in performance argue that Dir1SW+ may be a more effective use of resources. The small performance difference is attributable to two factors: the low degree of sharing in the benchmarks and Check- In/Check-Out (CICO) directives [9].

References

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Anant Agarwal, Richard Simoni, Mark Horowitz, and John Hennessy. An Evaluation of Directory Schemes for C~./~e Coherence. In Proceedings of the 15th Annual International Symposium on Computer Architecture, pages 280-289,1988.
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John K. Bennett, John B. Carter, and Willy Zwanepoel. Munin: Distributed Shared Memory Based on Type-Specific Memory Coherence. In Second ACM SIGPLAN Symposium on Principles 8~ Practice of Parallel Programming (PPOPP), pages 168-176, February 1990.
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David Chaiken, John Kubiatowics, and Anant Agarwsl. LimitLESS Directories: A Scalable Cache Coherence Scheme. In Proceedings of the Fourth International Conference on Ar. chitectural Support for Programming Languages and Operating Systems (ASPLOS IV), pages 224-234, April 1991.
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Anoop Gupta mad Wolf-Dietrich Weber. Cache Invalidation Patterns in Shared-Memory Multiprocessors. IEEE Transactions on Computers, 41(7):794-810, July 1992.
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David B. Gustavson. The Scalable Coherent Interface and Related Standards Projects. IEEE Micro, 12(2):10-22, February 1992.
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Mark D. Hill, James R. Larus, Steven K. Reinhardt, and David A. Wood. Cooperative Shared Memory: Software and Hardware for Scalable Multiprocessors. In Proceedings of the Fifth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS V), pages 262-273, October 1992.
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Raj fain. The Art of Computer Systems Performance Analysis: Techniques for Ea~perimental Design, Measurement, Simulation, and Modeling. John Wiley & Sons, 1991.
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David Kranz, Kirk Johnson, Anant Agarwal, Kubiatowitcz, and Beng-Hong Lira. Integrating Message-Passing and Shared-Memory: Early Experience. In Fourth A CM SIG- PLAN Symposium on Principles 8S Practice of Parallel Programming (PPOPP), May 1993. To appear.
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James R. Larus, Satish Chandra, and David A Wood. CICO: A Shared-Memory Programming Performance Model. Submitted for publication., January 1993.
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Daniel Lenoski, James Laudon, Kourosh Gharachorloo, Wolf-Dietrich Weber, Anoop Gupta, John Hennessy, Mark Horowitz, and Monica Lain. The Stanford DASH Multiprocessor. IEEE Computer, 25(3):63-79, March 1992.
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Steven K. Reinhardt, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James C. Lewis, and David A. Wood. The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers. In Proceedings of the 1993 ACM SIGMETRICS Conference on Measuring and Modeling of Computer Systems, page ?, May 1993. To appear.
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Wolf-Dietrich Weber and Anoop Gupta. Analysis of Cache Invalidation Patterns in Multiprocessors. In Proceedings of the Third International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS III), pages 243-256, April 1989.

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  • (2013)A new perspective for efficient virtual-cache coherenceACM SIGARCH Computer Architecture News10.1145/2508148.248596841:3(535-546)Online publication date: 23-Jun-2013
  • (2013)A new perspective for efficient virtual-cache coherenceProceedings of the 40th Annual International Symposium on Computer Architecture10.1145/2485922.2485968(535-546)Online publication date: 23-Jun-2013
  • (2005)Cid: A parallel, “shared-memory” C for distributed-memory machinesLanguages and Compilers for Parallel Computing10.1007/BFb0025891(376-390)Online publication date: 9-Jun-2005
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Published In

cover image ACM Conferences
ISCA '93: Proceedings of the 20th annual international symposium on computer architecture
June 1993
361 pages
ISBN:0818638109
DOI:10.1145/165123
  • cover image ACM SIGARCH Computer Architecture News
    ACM SIGARCH Computer Architecture News  Volume 21, Issue 2
    Special Issue: Proceedings of the 20th annual international symposium on Computer architecture (ISCA '93)
    May 1993
    348 pages
    ISSN:0163-5964
    DOI:10.1145/173682
    Issue’s Table of Contents

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 May 1993

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Author Tags

  1. cache coherence
  2. directory protocols
  3. hardware mechanisms
  4. memory systems
  5. shared-memory multiprocessors

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20ISCA93
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20ISCA93: 20th International Symposium on Computer Architecture
May 16 - 19, 1993
California, San Diego, USA

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Overall Acceptance Rate 543 of 3,203 submissions, 17%

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Cited By

View all
  • (2013)A new perspective for efficient virtual-cache coherenceACM SIGARCH Computer Architecture News10.1145/2508148.248596841:3(535-546)Online publication date: 23-Jun-2013
  • (2013)A new perspective for efficient virtual-cache coherenceProceedings of the 40th Annual International Symposium on Computer Architecture10.1145/2485922.2485968(535-546)Online publication date: 23-Jun-2013
  • (2005)Cid: A parallel, “shared-memory” C for distributed-memory machinesLanguages and Compilers for Parallel Computing10.1007/BFb0025891(376-390)Online publication date: 9-Jun-2005
  • (2001)ADir_pNBIEEE Transactions on Computers10.1109/12.95450750:9(921-934)Online publication date: 1-Sep-2001
  • (1999)An Efficient Tree Cache Coherence Protocol for Distributed Shared Memory MultiprocessorsIEEE Transactions on Computers10.1109/12.75500148:3(352-360)Online publication date: 1-Mar-1999
  • (1998)Retrospective: tempest and typhoon25 years of the international symposia on Computer architecture (selected papers)10.1145/285930.285968(98-102)Online publication date: 1-Aug-1998
  • (1998)Using prediction to accelerate coherence protocolsACM SIGARCH Computer Architecture News10.1145/279361.27938626:3(179-190)Online publication date: 16-Apr-1998
  • (1998)Using prediction to accelerate coherence protocolsProceedings of the 25th annual international symposium on Computer architecture10.1145/279358.279386(179-190)Online publication date: 16-Apr-1998
  • (1996)Decoupled hardware support for distributed shared memoryACM SIGARCH Computer Architecture News10.1145/232974.23297924:2(34-43)Online publication date: 1-May-1996
  • (1996)Decoupled hardware support for distributed shared memoryProceedings of the 23rd annual international symposium on Computer architecture10.1145/232973.232979(34-43)Online publication date: 15-May-1996
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