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801 storage: architecture and programming

Editor: Anita K. Jones Authors:

Mark F. MergenAuthors Info & Claims

ACM Transactions on Computer Systems (TOCS), Volume 6, Issue 1

Pages 28 - 50

https://doi.org/10.1145/35037.42270

Published: 01 February 1988 Publication History

Abstract

Based on novel architecture, the 801 minicomputer project has developed a low-level storage manager that can significantly simplify storage programming in subsystems and applications. The storage manager embodies three ideas: (1) large virtual storage, to contain all temporary data and permanent files for the active programs; (2) the innovation of database storage, which has implicit properties of access serializability and atomic update, similar to those of database transaction systems; and (3) access to all storage, including files, by the usual operations and types of a high-level programming language.

The IBM RT PC implements the hardware architecture necessary for these storage facilities in its storage controller (MMU). The storage manager and language elements required, as well as subsystems and applications that use them, have been implemented and studied in a prototype operating system called CPR, that runs on the RT PC. Low cost and good performance are achieved in both hardware and software. The design is intended to be extensible across a wide performance/cost spectrum.

References

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Reviews

Reviewer: Franz Stetter

The paper describes a low-level storage manager that is based on a prototype reduced instruction set computer. The aim is to simplify storage programming by means of a large virtual address space or a one-level-store, a database storage, hardware support for a transaction mechanism (similar to the use of hardware page faults), and a high-level programming language interface to all storage. The storage architecture provides segment registers to expand the virtual address space and an inverted page table for address translation. Some performance data indicate that “the cost of database storage is not obviously too high” and that “the implementation cost is modest for hardware and software.” Surely, more experience is necessary to exploit the concept properly. The paper is written very well and it gives much attention to implementation issues. I highly recommend the paper for all people interested in storage architectures, operating systems, or database systems.

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Published In

cover image ACM Transactions on Computer Systems

ACM Transactions on Computer Systems Volume 6, Issue 1

Feb. 1988

152 pages

ISSN:0734-2071

EISSN:1557-7333

DOI:10.1145/35037

Editor:
Anita K. Jones

Issue’s Table of Contents

Copyright © 1988 ACM.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 February 1988

Published in TOCS Volume 6, Issue 1

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https://dl.acm.org/doi/10.1145/3623759.3624552
Jain AKadiyala DDaglis A(2023)Safety Hints for HTM Capacity Abort Mitigation2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071113(206-219)Online publication date: Feb-2023
https://doi.org/10.1109/HPCA56546.2023.10071113
Stojkovic JMantri NSkarlatos DXu TTorrellas J(2023)Memory-Efficient Hashed Page Tables2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071061(1221-1235)Online publication date: Feb-2023
https://doi.org/10.1109/HPCA56546.2023.10071061
Larus JRajwar RLarus JRajwar R(2022)Hardware-Supported Transactional MemoryTransactional Memory10.1007/978-3-031-01719-3_4(131-205)Online publication date: 17-Oct-2022
https://doi.org/10.1007/978-3-031-01719-3_4
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Baldassin ABarreto JCastro DRomano P(2021)Persistent MemoryACM Computing Surveys10.1145/346540254:7(1-37)Online publication date: 18-Jul-2021
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Scott M(2013)Shared-Memory SynchronizationSynthesis Lectures on Computer Architecture10.2200/S00499ED1V01Y201304CAC0238:2(1-221)Online publication date: 12-Jun-2013
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