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Attacks in Reality: the Limits of Concurrent Error Detection Codes Against Laser Fault Injection

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Abstract

As a prominent attack approach against the security modules of integrated circuits, fault injection attacks (FIA) are able to breach thecryptographic primitives by analyzing the intentionally induced computation errors by adversaries. Parity-based Concurrent Error Detection (CED) techniques are often deployed as a countermeasure, owing to their low-overhead. Advanced linear and non-linear randomized encodings can be employed for constructing varying CED schemes. In this paper, we first evaluate the detection capability of linear parity-protected ciphers implemented in commercial FPGA, using laser fault injection (LFI) technique. A single-bit linear parity scheme is shown to be ineffective for error detection, since the LFI can typically flip multiple bits that are close to each other. On the other hand, a linear randomized parity scheme, with multiple bits parity, shows higher detection rates. Further, we study existing (randomized) non-linear encoding-based CED. With practical fault distributions on PRESENT cipher, non-linear randomized codes are extensively tested against fault injection. Although, known to have better theoretical detection bounds, non-linear encodings do not provide much improvements over simple randomized linear codes.

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References

  1. (2012) Iso/iec 29192-2:2012, information technology-security techniques-lightweight cryptography-part 2: Block cipher

  2. Agrawal D, Archambeault B, Rao JR, Rohatgi P (2003) The em side-channel (s). In: Cryptographic hardware and embedded systems-CHES 2002. Springer, Berlin, pp 29–45

  3. Anderson MS, North C, Yiu KK (2008) Towards countering the rise of the silicon trojan

  4. Bagheri N, Ebrahimpour R, Ghaedi N (2013) New differential fault analysis on present. EURASIP J Adv Signal Process 2013(1):1–10

    Article  Google Scholar 

  5. Barenghi A, Breveglieri L, Koren I, Naccache D (2012) Fault injection attacks on cryptographic devices: theory, practice, and countermeasures. Proc IEEE 100(11):3056–3076

    Article  Google Scholar 

  6. Bertoni G, Breveglieri L, Koren I, Maistri P, Piuri V (2003) Error analysis and detection procedures for a hardware implementation of the advanced encryption standard. IEEE Trans Commun 52(4):492–505

    Google Scholar 

  7. Biham E, Shamir A (1997) Differential fault analysis of secret key cryptosystems. In: Advances in cryptology-CRYPTO’97. Springer, Berlin, pp 513–525

  8. Bogdanov A, Knudsen LR, Leander G, Paar C, Poschmann A, Robshaw MJ, Seurin Y, Vikkelsoe C (2007) PRESENT: an Ultra-lightweight block cipher. Springer, Berlin

    MATH  Google Scholar 

  9. Boneh D, DeMillo RA, Lipton RJ (2001) On the Importance of eliminating errors in cryptographic computations. J Cryptol 14(2):101–119

    Article  MathSciNet  MATH  Google Scholar 

  10. Breier J, He W (2015) Multiple fault attack on PRESENT with a hardware trojan implementation in FPGA. In: 2015 international workshop on secure internet of things (SIot), pp 58–64. https://doi.org/10.1109/SIOT.2015.15

  11. Force T (2005) High performance microchip supply

  12. Gaisler J (1994) Concurrent error-detection and modular fault-tolerance in a 32-bit processing core for embedded space flight applications. In: Digest of papers., twenty-fourth international symposium on Fault-tolerant computing, 1994. FTCS-24 . IEEE, pp 128–130

  13. Gallager R (1962) Low-density parity-check codes. IRE Trans Inf Theory 8(1):21–28

    Article  MathSciNet  MATH  Google Scholar 

  14. Guo X, Mukhopadhyay D, Karri R (2012) Provably secure concurrent error detection against differential fault analysis. IACR Cryptology ePrint Archive 2012:552

    Google Scholar 

  15. He W, Breier J, Bhasin S, Jap D, Ong HG, Gan CL (2016) Comprehensive laser sensitivity profiling and data register bit-flips for cryptographic fault attacks in 65 nm fpga. In: Carlet C, Hasan MA, Saraswat V (eds) Security, privacy, and applied cryptography engineering: 6th international conference, SPACE 2016, hyderabad, india, december 14-18, 2016, proceedings. Springer International Publishing, Cham, pp 47–65

  16. Joye M, Tunstall M (2012) Fault analysis in cryptography, Springer, Berlin

  17. Karpovsky M, Kulikowski KJ, Taubin A (2004) Robust protection against fault-injection attacks on smart cards implementing the advanced encryption standard. In: 2004 international conference on dependable systems and networks. IEEE, Piscataway, pp 93–101

  18. Karpovsky MG, Taubin A (2004) New class of nonlinear systematic error detecting codes. IEEE Trans Inf Theory 50(8):1818–1820. https://doi.org/10.1109/TIT.2004.831844

    Article  MathSciNet  MATH  Google Scholar 

  19. Kermani M, Reyhani-Masoleh A (2006) Parity-based fault detection architecture of s-box for advanced encryption standard. In: 21st IEEE international symposium on defect and fault tolerance in VLSI systems, 2006, pp 572–580. DFT ’06. https://doi.org/10.1109/DFT.2006.50

  20. Kocher P, Jaffe J, Jun B, Rohatgi P (2011) Introduction to differential power analysis. J Cryptogr Eng 1(1):5–27

    Article  Google Scholar 

  21. Kulikowski KJ, Karpovsky MG, Taubin A (2006) Fault attack resistant cryptographic hardware with uniform error detection. In: Breveglieri L, Koren I, Naccache D, Seifert J (eds) Fault diagnosis and tolerance in cryptography, third international workshop, FDTC 2006, Yokohama, Japan, October 10, 2006, Proceedings, Lecture Notes in Computer Science, vol 4236. Springer, Berlin, pp 185–195. https://doi.org/10.1007/11889700_17

  22. Lohrke H, Scholz P, Boit C, Tajik S, Seifert JP (2016) Automated detection of fault sensitive locations for reconfiguration attacks on programmable logic. In: Proceedings of the 42nd international symposium for testing and failure analysis. ASM, pp 1–6

  23. Malkin TG, Standaert FX, Yung M (2006) A comparative cost/security analysis of fault attack countermeasures. In: Breveglieri L, Koren I, Naccache D, Seifert JP (eds) Fault diagnosis and tolerance in cryptography, lecture notes in computer science, vol 4236. Springer, Berlin, pp 159–172. https://doi.org/10.1007/11889700_15

  24. Mozaffari-Kermani M, Reyhani-Masoleh A (2008) A lightweight concurrent fault detection scheme for the aes s-boxes using normal basis. In: Oswald E, Rohatgi P (eds) Cryptographic hardware and embedded systems – CHES 2008, lecture notes in computer science, vol 5154. Springer, Berlin, pp 113–129. https://doi.org/10.1007/978-3-540-85053-3_8

  25. Mozaffari-Kermani M, Reyhani-Masoleh A (2010) Concurrent structure-independent fault detection schemes for the advanced encryption standard. IEEE Trans Commun 59(5):608–622

    MathSciNet  MATH  Google Scholar 

  26. Mozaffari-Kermani M, Reyhani-Masoleh A (2011) A lightweight high-performance fault detection scheme for the advanced encryption standard using composite fields. IEEE Trans Very Large Scale Integr VLSI Syst 19(1):85–91

    Article  MATH  Google Scholar 

  27. Perkins C, Muller G (2015) Using discrete event simulation to model attacker interactions with cyber and physical security systems. Procedia Comput Sci 61:221–226

    Article  Google Scholar 

  28. Sandberg H, Amin S, Johansson K (2015) Cyberphysical security in networked control systems: an introduction to the issue. IEEE Control Syst 35(1):20–23

    Article  MathSciNet  Google Scholar 

  29. Schmittner C, Ma Z, Schoitsch E, Gruber T (2015) A case study of fmvea and chassis as safety and security co-analysis method for automotive cyber-physical systems. In: Proceedings of the 1st ACM workshop on cyber-physical system security. ACM, New York , pp 69–80

  30. Selmane N, Guilley S, Danger JL (2008) Practical setup time violation attacks on aes. In: Dependable computing conference, 2008. EDCC 2008. Seventh european. IEEE, Piscataway, pp 91–96

  31. Skorobogatov S, Anderson R (2003) Optical fault induction attacks. In: Kaliski B, Koç ç, Paar C (eds) Cryptographic hardware and embedded systems - CHES 2002, lecture notes in computer science, vol 2523. Springer, Berlin, pp 2–12. https://doi.org/10.1007/3-540-36400-5_2

  32. Tehranipoor M, Koushanfar F (2010) Guest editors’ introduction: confronting the hardware trustworthiness problem. IEEE Des Test Comput 27(1):8–9

    Article  Google Scholar 

  33. Tehranipoor M, Koushanfar F (2010) A survey of hardware trojan taxonomy and detection

  34. Wang Z, Karpovsky M, Kulikowski KJ (2010) Design of memories with concurrent error detection and correction by nonlinear sec-ded codes. J Electron Test 26(5):559–580

    Article  Google Scholar 

  35. Wen L, Jiang W, Jiang K, Zhang X, Pan X, Zhou K (2015) Detecting fault injection attacks on embedded real-time applications: a system-level perspective. In: 2015 IEEE 17th international conference on high performance computing and communications, 2015 IEEE 7th international symposium on cyberspace safety and security, and 2015 IEEE 12th international conference on embedded software and systems, pp 700–705. https://doi.org/10.1109/HPCC-CSS-ICESS.2015.165

  36. Wu K, Karri R, Kuznetsov G, Goessel M (2004) Low cost concurrent error detection for the advanced encryption standard. In: Proceedings of the IEEE international test conference (ITC 2004), pp 1242–1248

  37. Wu TF, Ganesan K, Hu YA, Wong HP, Wong SS, Mitra S (2016) TPAD: hardware trojan prevention and detection for trusted integrated circuits. IEEE Trans on CAD of Integrated Circuits and Systems 35 (4):521–534. https://doi.org/10.1109/TCAD.2015.2474373

    Article  Google Scholar 

  38. Zhu B, Joseph A, Sastry S (2011) A taxonomy of cyber attacks on scada systems. In: Internet of things (ithings/CPSCom), 2011 international conference on and 4th international conference on cyber, physical and social computing. IEEE, Piscataway, pp 380–388

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Authors and Affiliations

  1. Physical Analysis and Cryptographic Engineering, Temasek Laboratories at Nanyang Technological University, Singapore, Singapore

    Jakub Breier, Dirmanto Jap & Shivam Bhasin

  2. Shield Lab, Central Research Institute Huawei International Pte. Ltd., Singapore, Singapore

    Wei He

  3. School of Computer Science and Engineering, Nanyang Technological University, Singapore, Singapore

    Anupam Chattopadhyay

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  1. Jakub Breier
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  2. Wei He
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  3. Dirmanto Jap
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  5. Anupam Chattopadhyay
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Correspondence to Jakub Breier.

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The research was conducted when author was with Temasek Laboratories

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Breier, J., He, W., Jap, D. et al. Attacks in Reality: the Limits of Concurrent Error Detection Codes Against Laser Fault Injection. J Hardw Syst Secur 1, 298–310 (2017). https://doi.org/10.1007/s41635-017-0020-3

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  • DOI: https://doi.org/10.1007/s41635-017-0020-3

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