Abstract
Based on the integral method of single event upset (SEU) rate and an improved charge collection model for ultra-deep submicron complementary metal-oxide-semiconductor (CMOS) devices, three methods of SEU rate calculation are verified and compared. The results show that the integral method and the figure of merit (FOM) methods are basically consistent at the ultra-deep submicron level. By proving the validity of the carrier collection model considering charge sharing, the applicability of two FOM methods is verified, and the trends of single-bit and multiple-bit upset rates for ultra-deep submicron CMOS are analyzed.
Similar content being viewed by others
References
McMorrow D, Khachatrian A, Roche N J-H, et al. Single-Event upsets in substrate-etched CMOS SOI SRAMs using ultraviolet optical pulses with sub-Micrometer spot size. IEEE Trans Nucl Sci, 2013; 60: 4184–4191
He Y B, Chen S M. Comparison of heavy-ion induced SEU for D- and TMR-flip-flop designs in 65-nm bulk CMOS technology. Sci China Inf Sci, 2014, 57: 102405
Wang Z M, Yao Z B, Guo H X, et al. Bitstream decoding and SEU-induced failure analysis in SRAM-based FPGAs. Sci China Inf Sci, 2012; 55: 971–982
Moukhtari I E, Pouget V, Larue C, et al. Impact of negative bias temperature instability on the single-event upset threshold of a 65 nm SRAM cell. Microelectron Rel, 2013; 53: 1325–1328
Petersen E L, Koga R, Shoga M A, et al. The single event revolution. IEEE Trans Nucl Sci, 2013; 60: 1824–1835
Raine M, Hubert G, Paillet P, et al. Implementing realistic heavy ion tracks in a SEE prediction tool: comparison between different approaches. IEEE Trans Nucl Sci, 2012; 59: 950–957
Amusan O A, Witulski A F, Massengill LW, et al. Charge collection and charge sharing in a 130 nm CMOS technology. IEEE Trans Nucl Sci, 2006; 53: 3253–3258
Amusan O A, Massengill L W, Baze M P, et al. Single event upsets in deep-submicrometer technologies due to charge sharing. IEEE Trans Dev Mater Rel, 2008; 8: 582–589
Blum D R. Hardened by design approaches for mitigating transient faults in memory-based systems. Dissertation for the Doctoral Degree. Pullman: Washington State University, 2007
Tipton A D, Pellish J A, Reed R A, et al. Multiple-bit upset in 130 nm CMOS technology. IEEE Trans Nucl Sci, 2006; 53: 3259–3264
Connel L W, McDaniel P J, Prinja A K, et al. Modeling the heavy ion upset cross section. IEEE Trans Nucl Sci, 1995; 42: 73–82
Connell L W, Sexton F W, Prinja A K. Further development of the heavy ion cross section for single event upset: model (HICUP). IEEE Trans Nucl Sci, 1995; 42: 2026–2034
Foro L L, Touboul A D,Wrobel F, et al. A simple method for assessing power devices sensitivity to SEEs in atmospheric environment. IEEE Trans Nucl Sci, 2013; 60: 2559–2566
Warren K W, Wilkinson J D, Weller R A, et al. Predicting neutron induced soft error rates: evaluation of accelerated ground based test methods. In: Proceedings of IEEE International Reliability Physics Symposium, Phoenix, 2008. 473–477
Warren K M, Sierawski B D, Reed R A, et al. Monte-Carlo based on-orbit single event upset rate prediction for a radiation hardened by design latch. IEEE Trans Nucl Sci, 2007; 54: 2419–2425
Warren K M, Weller R A, Sierawski B D, et al. Application of RADSAFE to model the single event upset response of a 0.25 µm CMOS SRAM. IEEE Trans Nucl Sci, 2007; 54: 898–903
Warren K M, Sternberg A L, Weller R A, et al. Integrating circuit level simulation and Monte-Carlo radiation transport code for single event upset analysis in SEU hardened circuitry. IEEE Trans Nucl Sci, 2008; 55: 2886–2894
Hubert G, Duzellier S, Inguimbert C, et al. Operational SER calculations on the SAC-C orbit using the multi-scales single event phenomena predictive platform. IEEE Trans Nucl Sci, 2009; 56: 3032–3042
Petersen E L. Interpretation of heavy ion cross section measurements. IEEE Trans Nucl Sci, 1996; 43: 952–959
Petersen E L. The SEU figure of merit and proton upset rate calculations. IEEE Trans Nucl Sci, 1998; 45: 2550–2562
Roche P, Gasiot G, Uznanski S, et al. A commercial 65nm CMOS technology for space applications: heavy ion, proton and gamma test results and modeling. In: Proceedings of European Conference on Radiation and Its Effects on Components and Systems, Bruges, 2009. 456–464
Petersen E L, Shapiro P, Adams J H, et al. Calculation of cosmic-ray induced soft upsets and scaling in VLSI devices. IEEE Trans Nucl Sci, 1982; 29: 2055–2063
Hubert G, Bourdarie S, Artola L, et al. Multi-scale modeling to investigate the single event effects for space missions. Acta Astronaut, 2011; 69: 526–536
Hazucha P, Svensson C. Impact of CMOS technology scaling on the atmospheric neutron soft error rate. IEEE Trans Nucl Sci, 2000; 47: 2586–2594
Amusan O A, Massengill L W, Baze M P, et al. Single event upsets in deep-submicrometer technologies due to charge sharing. IEEE Trans Dev Mater Rel, 2008; 8: 582–589
Giot D, Roche P, Gasiot G, et al. Multiple-bit upset analysis in 90 nm srams: heavy ions testing and 3d simulations. IEEE Trans Nucl Sci, 2007; 54: 904–911
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
He, L., Chen, H., Sun, P. et al. Single event upset rate modeling for ultra-deep submicron complementary metal-oxide-semiconductor devices. Sci. China Inf. Sci. 59, 042402 (2016). https://doi.org/10.1007/s11432-015-5362-2
Received:
Accepted:
Published:
DOI: https://doi.org/10.1007/s11432-015-5362-2