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A Combined Techniques of PC + MPC + APC to Achieve Higher Error Correction Probability and Throughput over APC and MPC Techniques

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Abstract

A new combined technique of Packet Combining (PC), Modified Packet Combining (MPC) and Aggressive Packet Combining (APC) is presented for improving the performance of MPC and APC. The proposed protocol consists of three blocks; PC block, MPC block, and APC block. Two copies of the same packet are sent from transmitter to receiver (Rx). If both the copies are found as erroneous then PC technique is used to correct the original copy in the PC block and if it is not obtained a successful copy then the Rx requests for a third copy. Again, if the third copy is found as erroneous then MPC and APC techniques are implemented in the MPC and APC blocks respectively. In order to get fast error correction and also to utilize the half-corrected or resultant copies instead of discarding the received erroneous copies, MPC block uses the resultant copies of the PC block and APC block also uses the resultant copies of MPC block. Thus, the proposed protocol is simulated using MATLAB and the simulation results obtain better performance by adopting the evaluation metrics of the probability of packet error correction, packet throughput and energy consumption over conventional MPC and APC techniques.

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Acknowledgements

This research works under “Visvesvaraya Ph. D Scheme” is financially supported by the Ministry of Electronics & Information Technology (MeitY), Government of India.

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  1. Department of Computer Science & Engineering, NIT Arunachal Pradesh, Yupia, 791112, India

    Sanjit Ningthoujam & Swarnendu K. Chakraborty

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  1. Sanjit Ningthoujam
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  2. Swarnendu K. Chakraborty
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Correspondence to Sanjit Ningthoujam.

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Ningthoujam, S., Chakraborty, S.K. A Combined Techniques of PC + MPC + APC to Achieve Higher Error Correction Probability and Throughput over APC and MPC Techniques. Wireless Pers Commun 111, 2137–2153 (2020). https://doi.org/10.1007/s11277-019-06976-w

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