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Thermal-aware application mapping using genetic and fuzzy logic techniques for minimizing temperature in three-dimensional network-on-chip

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Abstract

3D integration is one of the scalable multiprocessor design solutions. The main challenge in 3D design is temperature traps, especially in the upper layers and hot spots. The current studies present solutions for solving temperature and hotspot problems in topology, routing, and mapping levels. Accordingly, the characteristics of temperature-aware core mapping are beneficial for dealing with the challenges of 3D chips. In this paper, the core temperature is modeled based on processing, communication power, neighbor node temperature, distance from the heat sink, and hotspot node. To find the optimal solution, this paper proposes thermal-aware application mapping techniques using genetic algorithms and fuzzy logic to minimize peak temperatures in 3D network-on-chip (NoC) architectures. Fitness functions include the above parameters with the same weight (GSM) and the fitness function with fuzzy logic by considering the effect of distance from heat sink (GFM1) and heat sink distance and the number of neighbor’s core (GFM2). Specifically, the fuzzy logic-based GFM1 algorithm demonstrates superior performance over the genetic algorithm-driven GSM approach in reducing power consumption and energy costs associated with inter-core communication traffic. Across the different traffic patterns tested, GFM1 consistently achieves lower energy expenditure, with reductions upward of 50% compared to GSM. This underlines the strengths of the fuzzy technique in enabling thermal-aware mapping to minimize chip temperatures in the presence of intensive workloads and communication. In essence, the key takeaway is that GFM1 outperforms GSM in the context of power and energy metrics linked to handling on-chip traffic between processing cores.

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Authors and Affiliations

  1. Department of Computer Engineering Science and Research Branch, Islamic Azad University, Tehran, Iran

    Farzaneh Asadzadeh & Midia Reshadi

  2. Department of Computer Engineering, Shahr-e-Qods Branch, Islamic Azad University, Tehran, Iran

    Akram Reza

  3. Iran Telecommunication Research Center, Tehran, Iran

    Ahmad Khademzadeh

Authors
  1. Farzaneh Asadzadeh
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  2. Akram Reza
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  3. Midia Reshadi
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  4. Ahmad Khademzadeh
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Farzaneh and Akram worked on the main idea and wrote the manuscript. Akram, Midia, and Ahmad reviewed the manuscript and suggested some improvements. Finally, all authors reviewed the manuscript.

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Correspondence to Akram Reza.

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Asadzadeh, F., Reza, A., Reshadi, M. et al. Thermal-aware application mapping using genetic and fuzzy logic techniques for minimizing temperature in three-dimensional network-on-chip. J Supercomput 80, 11214–11240 (2024). https://doi.org/10.1007/s11227-023-05869-x

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