Abstract
In this contribution we present a novel general model for adaptive processors. We describe its basic principle of operation and introduce several formal characterizations. The adaptive operations that are possible with this model are thoroughly discussed. The model allows runtime variations of the type and number of functional units as well as variations of the communication structure. We introduce simple heuristics to achieve adaptivity of the architecture. Experimental results show that a processor implementing this model can adapt its architecture to the requirements of diverse applications.
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Gatzka, S., Hochberger, C. The AMIDAR Class of Reconfigurable Processors. J Supercomput 32, 163–181 (2005). https://doi.org/10.1007/s11227-005-0290-3
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DOI: https://doi.org/10.1007/s11227-005-0290-3