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Minimal realizations of integrable memristor emulators

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Abstract

This paper introduces two novel structures of memristor emulators. The proposed designs are obtainable in both forms of grounded and floating as required in many of the highly demanded applications. The proposed designs of memristor emulators employ single current follower differential input transconductance amplifier as active element and one grounded capacitor only. Single active element-based simpler design and good operating frequency range enhance the beauty of proposed emulators. Moreover, zero phase shift between voltage and current signals along with convergence of memristor current to zero at applied zero voltage signal further enriches the quality of proposed work. Non-ideal aspects are also well covered by incorporating detailed study on non-ideal and parasitic effects. Monte Carlo simulations are carried out to check real-time performance of proposed memristor emulators for deviations in threshold voltages of MOS transistors. PSPICE simulation results using typical 0.18 µm CMOS process parameters are utilized in the verification of presented theoretical aspects. Furthermore, experimental realization using commercially available ICs is also explored to enrich the presented idea.

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The authors declare that no funds, grants, or other support were received during the preparation of this manuscript.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Jaypee Institute of Information Technology, Noida, U.P., 201304, India

    Atul Kumar, Bhartendu Chaturvedi & Jitendra Mohan

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  1. Atul Kumar
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  2. Bhartendu Chaturvedi
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  3. Jitendra Mohan
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Correspondence to Atul Kumar.

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Kumar, A., Chaturvedi, B. & Mohan, J. Minimal realizations of integrable memristor emulators. J Comput Electron 22, 504–518 (2023). https://doi.org/10.1007/s10825-022-01963-0

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