Nothing Special   »   [go: up one dir, main page]
Skip to main content
Springer Nature Link
Log in

Integrating the SysML and the SystemC-UML profiles in a model-driven embedded system design flow

  • Published:
Design Automation for Embedded Systems Aims and scope Submit manuscript

Abstract

Modern embedded systems development, due to systems complexity and multifaceted nature, requires flexible high-level design techniques and notations. In this context, model-driven approaches are gaining popularity, both in industry as well as in academy, since they offer a high degree of abstraction and provide a common framework for the design, simulation and configuration management of complex heterogeneous systems. Moreover, a great variety of languages have been emerging as customization (or profiles) of the Unified Modeling Language (UML) for the embedded system and System-on-Chip (SoC) domains.

No single modeling language or profile is adequate to cover aspects and requirements of the whole system development flow. Indeed, each of these languages owns characteristics and offers modeling primitives suitable for designing at a specific abstraction level. Therefore, possible strategies for integrating such UML profiles must be determined, in order to establish a common modeling framework able to support all steps of a system design development.

This paper presents the integration of two modeling languages, the SysML and the SystemC UML profiles. The integration is based on a mapping from the SysML to the SystemC UML profile for the structural aspects, while for the behavioral aspects two main models of computation, SysML control-flow graphs and SystemC Process state machines, are proposed as complementary behavioral formalisms to be adopted in a model-driven SoC design flow at platform-independent and platform-specific description level, respectively.

The integration we propose, has enabled us also to refine an already defined model-driven hardware-software co-design flow, where a gap remained moving from a platform-independent design level to a platform-specific level. The refined co-design flow starts from a SysML description at a high level of design abstraction, and proceeds through a chain of refined SystemC UML models, to lower levels of design abstraction, where the more complex last-level SystemC coding is left to automation.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15
Fig. 16
Fig. 17
Fig. 18
Fig. 19
Fig. 20

Similar content being viewed by others

Notes

  1. The concept of implementation “platform” is quite vaguely and not well-defined in MDA [4], making it difficult to draw a clear line between PIMs and PSMs. In order to formulate a precise notion of PIMs and PSMs, a precise and concrete definition of what a platform is and what a platform model looks like is necessary.

  2. The UP is an open software engineering process from the authors of UML. The RUP (Rational Unified Process) is the most widely used commercial variant of UP.

  3. Note that since the architecture template may be implemented by assembling reusable hardware and software IP components, possibly provided by third-party companies, the platform selection process may imply also an IP integration step comprising a set of tasks that are needed to assemble pre-designed components in order to fulfill the desired SoC requirements.

  4. Model weaving is considered in the MDE context [5, 19] as the operation for setting fine-grained relationships between different models, each one describing a certain concern, and produce their integration into a final model representing the entire domain. Weaving links permit describing the aspects both separately and in combination.

  5. The expression UML “method” state machine is here used to denote an UML state machine specifying the algorithm or procedure for a behavioral feature such as a class’s operation, and therefore being the method of this behavioral feature [50].

  6. sc_signals are primitive channels that may generate additional delta-event notifications, thus making more processes runnable.

  7. Multiple levels of a system design hierarchy are common in current-generation SoC integrated circuits.

  8. In general, ports specifies interaction points on blocks and parts. Standard UML ports are typed by an interface and specify a set of required or provided operations and/or signals. SysML flow ports specify what can flow in or out of a block/part and may be typed by a block, value type, or flow specification.

  9. The SystemC UML model is initially untimed since it is derived from a SysML model that has no time model.

  10. Indeed, the associated behavior given by the SC process state machine, is not immediately activated, but after an occurrence of the event e.

  11. An sc_method process is similar to an sc_thread in an infinite loop with a static_wait closing the loop; when triggered, an sc_method will be executed once, while an sc_thread will be executed until the first synch point (wait-states).

  12. http://www.omg.org/spec/XMI/2.1/.

  13. In general, SysML flow ports are intended to be used for asynchronous, broadcast, or send-and-forget interactions. They involve more components than just themselves.

  14. The stereotype optional applied to the object node load means that the parameter is not required to have a value for the count_up behavior to begin or end execution.

  15. Initially, all processes are runnable.

  16. SystemC has an integer-valued absolute time model. Time is internally represented by an unsigned integer of at least 64-bits. Time starts at 0, and moves forward only.

  17. The OCCN project [1] focuses on modelling complex on-chip communication networks by providing a highly-parameterized and configurable SystemC library for connecting multiple processing elements and storage elements on a single chip.

  18. SysML’s requirement modeling support provides the ability to assess the impact of changing requirements to a system’s architecture.

  19. MARTE is an evolution of the SPT profile to align this profile with the UML2.

References

  1. The OCCN Project Website. occn.sourceforge.net

  2. Abouzahra A, Bezivin J, Fabro MDD, Jouault F (2005) A practical approach to bridging domain specific languages with UML profiles. In: Workshop on best practices for model driven software development at OOPSLA05

    Google Scholar 

  3. Arlow J, Neustadt I (2002) UML and the unified process. Addison Wesley, Reading

    Google Scholar 

  4. Atkinson C, Kühne T (2005) A generalized notion of platforms for model driven development. In: Beydeda S, Book M, Gruhn V (eds) Model-driven software development. Research and practice in software engineering, vol II

    Google Scholar 

  5. Bézivin J (2005) On the unification power of models. Softw Syst Model 4(2):171–188

    Article  Google Scholar 

  6. Bocchio S, Riccobene E, Rosti A, Scandurra P (2008) An enhanced SystemC UML profile for modeling at transaction-level. In: Villar E (ed) Embedded systems specification and design languages

    Google Scholar 

  7. Bocchio S, Rosti A (2007) A case study about the usage of a UML 2.0 profile for HW-SW co-design. In: Proc of the UML for SoC and embedded system design workshop at DATE’07

    Google Scholar 

  8. Bock C (2006) SysML and UML 2 support for activity modeling. Syst Eng 9(2):160–186

    Article  Google Scholar 

  9. Boutekkouk F, Benmohammed M, Bilavarn S, Auguin M (2009) UML2.0 profiles for embedded systems and systems on a chip (SOCs). J Object Technol 8(1):135–157

    Google Scholar 

  10. CoCentric SystemC Compiler, Synopsys. http://www.synopsys.com

  11. Coppola M, Curaba S, Grammatikakis M, Maruccia G, Papariello F (2003) OCCN communication channels for inter-module communication. STMicroelectronics Tech Rep, OCCN GPL license, AST Grenoble Lab, France. occn.sourceforge.net/

  12. Dietz J (2006) Enterprise ontology—theory and methodology. Springer, Berlin, Heidelberg

    Book  Google Scholar 

  13. Dumoulin C, Boulet P, Dekeyser J-L, Marquet P (2003) MDA for SoC design, intensive signal processing experiment. In: Proc FDL’03. ECSI

    Google Scholar 

  14. UML Profiles for Embedded Systems (2006) www.ecsi-association.org/ecsi/. 27–28 March, 2006

  15. Edwards M, Green P (2003) UML for hardware and software object modeling. In: UML for real: design of embedded real-time systems. Kluwer Academic, Dordrecht, pp 127–147

    Google Scholar 

  16. The Enterprise Architect tool (2009) www.sparxsystems.com.au/

  17. Espinoza H, Cancila D, Selic B, Gérard S (2009) Challenges in combining SysML and MARTE for model-based design of embedded systems. In: Paige RF, Hartman A, Rensink A (eds) ECMDA-FA. Lecture notes in computer science, vol 5562. Springer, Berlin, pp 98–113

    Google Scholar 

  18. Friedenthal S, Moore A, Steiner R (2012) A practical guide to SysML: the systems modeling language. Elsevier, Amsterdam

    Google Scholar 

  19. Gargantini A, Riccobene E, Scandurra P (2009) A semantic framework for metamodel-based languages. Autom Softw Eng 16(3–4):415–454

    Article  Google Scholar 

  20. Martin G (1999) UML and VCC. White paper, Cadence Design Systems, Inc

  21. SPIRIT Consortium (2007) IP-XACT schema v1.4. www.spiritconsortium.org

  22. Kawahara R, Nakamura H, Dotan D, Kirshin A, Sakairi T, Hirose S, Ono K, Ishikawa H (2009) Verification of embedded system’s specification using collaborative simulation of SysML and simulink models. In: International conference on model-based systems engineering (MBSE’09). IEEE, New York, pp 21–28

    Chapter  Google Scholar 

  23. Keutzer K, Newton AR, Rabaey JM, Vincentelli AS (2000) System-level design: orthogonalization of concerns and platform-based design. IEEE Trans Comput-Aided Des Integr Circuits Syst 19(12):1523–1543

    Article  Google Scholar 

  24. Kreku J, Hoppari M, Tiensyrja K (2007) SystemC workload model generation from UML for performance simulation. In: Proc of forum on specification and design languages

    Google Scholar 

  25. Kruchten P (1999) The rational unified process. Addison Wesley, Reading

    Google Scholar 

  26. Lavagno L, Martin G, Vincentelli AS, Rabaey J, Chen R, Sgroi M (2003) UML and platform based design. In: UML for real design of embedded real-time systems

    Google Scholar 

  27. OMG (2009) UML profile for modeling and analysis of real-time and embedded systems (MARTE), v1.0, formal/2009-11-02. http://www.omg.org/spec/MARTE/1.0/

  28. Martin G, Mueller W (2005) UML for SoC design. ISBN 0-387-25744-6, Springer, Berlin

    Book  Google Scholar 

  29. OMG (2003) The model driven architecture (MDA guide V1.0.1). http://www.omg.org/mda/

  30. The MoPCoM project. http://www.mopcom.fr/

  31. Mueller W, Mishkadla F (2010) A UML profile for SysML based comodeling, simulation, synthesis of embedded systems. In: M-BED 2010: proc of the first workshop on model based engineering for embedded systems design (co-located with DATE 2010)

    Google Scholar 

  32. Mueller W, Rosti A, Bocchio S, Riccobene E, Scandurra P, Dehaene W, Vanderperren Y (2006) UML for ESL design: basic principles, tools, and applications. In: ICCAD ’06: proc IEEE/ACM international conference on computer-aided design. ACM, New York, pp 73–80

    Chapter  Google Scholar 

  33. Mura M, Murillo LG, Prevostini M (2008) Model-based design space exploration for RTES with SysML and MARTE. In: FDL. IEEE, New York, pp 203–208

    Google Scholar 

  34. Mura M, Panda A, Prevostini M (2008) Executable models and verification from MARTE and SysML: a comparative study of code generation capabilities. In: DATE’08, workshop on modeling and analysis of real-time and embedded systems with the MARTE UML profile. IEEE, New York

    Google Scholar 

  35. Nguyen KD, Sun Z, Thiagarajan PS, Wong WF (2005) Model-driven SoC design: the UML-SystemC bridge. In: UML for SOC design. Springer, Berlin

    Google Scholar 

  36. OMG (2006) Object Constraint Language (OCL), 2.0 formal/2006-05-01

  37. Piel É., Ben Atitallah R, Marquet P, Meftali S, Etien A, Niar S, Dekeyser JL, Boulet P (2008) Gaspard2: from MARTE to SystemC simulation. In: DATE’08, workshop on modeling and analysis of real-time and embedded systems with the MARTE UML profile. IEEE, New York

    Google Scholar 

  38. Zhu Q, Oishi R, Hasegawa T, Nakata T (2004) System-on-chip validation using UML and CWL. In: Proc of the 2nd IEEE/ACM/IFIP int conf on hardware/software codesign and system synthesis (CODES+ISSS), pp 92–97

    Chapter  Google Scholar 

  39. Raslam W, Sameh A (2007) Mapping SysML to SystemC. In: Forum on design and specification languages

    Google Scholar 

  40. Riccobene E, Scandurra P (2009) Model transformations in the UPES/UPSoC development process for embedded systems. Innov Syst Softw Eng 5(1):35–47

    Article  Google Scholar 

  41. Riccobene E, Scandurra P, Bocchio S, Rosti A, Lavazza L, Mantellini L (2009) SystemC/C-based model-driven design for embedded systems. ACM Trans Embed Comput Syst 8(4):30

    Google Scholar 

  42. Riccobene E, Scandurra P, Rosti A, Bocchio S (2005) A UML 2.0 profile for SystemC. STMicroelectronics Technical Report, AST-AGR-2005-3

  43. Riccobene E, Scandurra P, Rosti A, Bocchio S (2006) A model-driven design environment for embedded systems. In: Proc of the 43rd annual conference on design automation. ACM, New York, pp 915–918

    Chapter  Google Scholar 

  44. Riccobene E, Scandurra P, Rosti A, Bocchio S (2007) Designing a unified process for embedded systems. In: Fourth int workshop on model-based methodologies for pervasive and embedded software. IEEE, New York

    Google Scholar 

  45. Selic B (2000) A generic framework for modeling resources with UML. Computer 33(6):64–69

    Article  Google Scholar 

  46. OMG (2003) UML profile for schedulability. Performance, and time formal/03-09-01

  47. OMG (2007) SysML, formal/2007-09-01. http://www.omgsysml.org/

  48. SystemC Language Reference Manual (2006) IEEE Std 1666

  49. Moore T, Vanderperren Y, Sonck G, Van Oostende P, Pauwels M, Dehaene W (2002) A design methodology for the development of a complex system-on-chip using UML and executable system models. In: Proc of forum on specification and design languages

    Google Scholar 

  50. OMG (2009) The Unified Modeling Language (UML), v2.2. http://www.uml.org

  51. UML for SoC Design Workshops (2008) www.c-lab.de/uml-soc

  52. OMG (2006) UML Profile for SoC Specification, v1.0.1

  53. Vanderperren Y, Dehaene W (2005) SysML and systems engineering applied to UML-based SoC design. In: Proc UML-SoC

    Google Scholar 

  54. Vanderperren Y, Dehaene W (2006) From UML/SysML to Matlab/Simulink: current state and future perspectives. In: Gielen GGE (ed) DATE. European Design and Automation Association, Leuven, p 93

    Google Scholar 

  55. Varona-Gomez R, Villar E (2009) AADL simulation and performance analysis in SystemC. In: ICECCS, IEEE Computer Society, Los Alamitos, pp 323–328

    Google Scholar 

  56. Vincentelli AS (2007) Quo vadis, SLD? Reasoning about the trends and challenges of system level design. Proc IEEE 95(3):467–506

    Article  Google Scholar 

  57. Vincentelli AS (2002) Defining platform-based design. EEDesign [online]

  58. Zhang T, Jouault F, Bézivin J, Li X (2008) An MDE-based method for bridging different design notations. Innov Syst Softw Eng 4(3):203–213

    Article  Google Scholar 

  59. Zimmermann J, Bringmann O, Gerlach J, Schaefer F, Nageldinger U (2008) Holistic system modeling and refinement of interconnected microelectronic systems. In: MARTE workshop at design automation and test in Europe (DATE) conference

    Google Scholar 

Download references

Acknowledgements

We would like to thank Alberto Rosti and Sara Bocchio from STMIcroelectronics for their precious help with the design tool and case studies.

Author information

Authors and Affiliations

  1. Dipartimento di Informatica, Università degli Studi di Milano, Via Bramante 65, 26013, Crema, CR, Italy

    Elvinia Riccobene

  2. Dipartimento di Ingegneria, Università degli Studi di Bergamo, Viale Marconi 5, 24044, Dalmine, BG, Italy

    Patrizia Scandurra

Authors
  1. Elvinia Riccobene
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Patrizia Scandurra
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Elvinia Riccobene.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Riccobene, E., Scandurra, P. Integrating the SysML and the SystemC-UML profiles in a model-driven embedded system design flow. Des Autom Embed Syst 16, 53–91 (2012). https://doi.org/10.1007/s10617-012-9097-7

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10617-012-9097-7

Keywords

Search

Navigation