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Designing and dynamically load balancing hybrid LU for multi/many-core

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Computer Science - Research and Development

Abstract

Designing high-performance LU factorization for modern hybrid multi/many-core systems requires highly-tuned BLAS subroutines, hiding communication latency and balancing the load across devices of variable processing capabilities. In this paper we show how single-precision LU factorization is accelerated on Intel® MIC(Many Integrated Core) architecture in both native and hybrid (Intel® Xeon® processor and Intel MIC) configurations. Our SGEMM implementation delivers close to 1 Tflop/s on Intel’s first implementation of Intel MIC architecture [codenamed Knight’s Ferry (KNF)] silicon platform. Our implementation takes full advantage of multiple levels of memory hierarchy on MIC, and successfully utilizes up to 80% of its peak compute capability. Our LU factorization performance exceeds 570 Gflop/s including matrix transfer overhead when executed entirely on a KNF coprocessor. Our hybrid implementation, which offloads parts of LU processing to a dual-socket multi-core Intel Xeon processor X5680 host, delivers up to 772 Gflop/s. The novel aspect of our implementations is dynamic resource partitioning to improve load balance across the entire system.

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Author information

Authors and Affiliations

  1. Intel Labs, Hillsboro, OR, USA

    Michael Deisher

  2. Intel Labs, Santa Clara, CA, USA

    Mikhail Smelyanskiy, Victor W. Lee & Pradeep Dubey

  3. Intel Architecture Group, Santa Clara, CA, USA

    Brian Nickerson

  4. Software and Solutions Group, Nizhny Novgorod, Russia

    Michael Chuvelev

Authors
  1. Michael Deisher
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  2. Mikhail Smelyanskiy
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  3. Brian Nickerson
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  4. Victor W. Lee
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  5. Michael Chuvelev
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  6. Pradeep Dubey
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Corresponding author

Correspondence to Michael Deisher.

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Deisher, M., Smelyanskiy, M., Nickerson, B. et al. Designing and dynamically load balancing hybrid LU for multi/many-core. Comput Sci Res Dev 26, 211–220 (2011). https://doi.org/10.1007/s00450-011-0169-x

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  • DOI: https://doi.org/10.1007/s00450-011-0169-x

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