Abstract
Generic vulnerability assessment of cipher implementations against Fault Attacks (FA) is a largely unexplored research area. Security assessment against FA is critical for FA countermeasures. On several occasions, countermeasures fail to fulfil their sole purpose of preventing FA due to flawed design or implementation. This paper proposes a generic, simulation-based, statistical yes/no experiment for evaluating fault-assisted information leakage based on the principle of non-interference. It builds on an initial idea called ALAFA that utilizes t-test and its higher-order variants for detecting leakage at different moments of ciphertext distributions. In this paper, we improve this idea with a Deep Learning (DL)-based leakage detection test. The DL-based detection test is not specific to only moment-based leakages. It thus can expose leakages in several cases where t-test-based technique demands a prohibitively large number of ciphertexts. Further, we present two generalizations of the leakage assessment experiment—one for evaluating against the statistical ineffective fault model and another for assessing fault-induced leakages originating from “non-cryptographic” peripheral components of a security module. Finally, we explore techniques for efficiently covering the fault space of a block cipher by exploiting logic-level and cipher-level fault equivalences. The efficacy of our proposals has been evaluated on a rich test suite of hardened implementations, including an open-source Statistical Ineffective Fault Attack countermeasure and a hardware security module called Secured-Hardware-Extension.
Similar content being viewed by others
Notes
The leakage function in FA varies between attack strategies, fault models, ciphers and countermeasure algorithms (unlike SCA leakage functions which are usually specified by Hamming weight/distance). For example, in a typical differential fault analysis attack, the leakage function is decided by the fault propagation path, which varies with the cipher, the fault location, and the countermeasure.
A probabilistic program PP is a routine, which contains both probabilistic and deterministic assignments and variables, when represented in Single-Static-Assignment (SSA) form. A PP takes a joint distribution of input variables and outputs a joint distribution of output variables.
Batch Normalization speeds up the learning process [68].
The syntheses were performed using Synopsys Design Compiler and DFT Compiler (with STMicroelectronics CMOS65—a 65nm technology library due to STMicroelectronics). No area/timing optimization was imposed during synthesis. All Synopsys tools utilized in this work are under registered trademarks of Synopsys Inc (https://www.synopsys.com).
There are 16 such locations.
ALAFA requires the construction of all possible subsets up to the specific leakage-order. In the present case, we need to go up to order 128. The number of subsets up to order 128 is \(2^{128}\), which is infeasible to cover. So we consider one case where the order of test is 128. The result shown in the plots is for test order 128.
Note that for this countermeasure, leakage has been observed while the ciphertexts are considered bit-wise.
References
E. Biham, A. Shamir, Differential fault analysis of secret key cryptosystems, in Annual International Cryptology Conference (Springer, 1997), pp. 513–525
M. Tunstall, D. Mukhopadhyay, S. Ali, Differential fault analysis of the advanced encryption standard using a single fault, in IFIP International Workshop on Information Security Theory and Practices (Springer, 2011), pp. 224–233
M. Agoyan, J.M. Dutertre, D. Naccache, B. Robisson, A. Tria, When clocks fail: On critical paths and clock faults, in International Conference on Smart Card Research and Advanced Applications (Springer, 2010), pp. 182–193
G. Canivet, P. Maistri, R. Leveugle, J. Clédière, F. Valette, M. Renaudin, Glitch and laser fault attacks onto a secure AES implementation on a SRAM-based FPGA. J. Cryptol. 24(2), 247–268 (2011)
A. Dehbaoui, J.M. Dutertre, B. Robisson, A. Tria, Electromagnetic transient faults injection on a hardware and a software implementations of AES, in 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography (IEEE, 2012), pp. 7–15
M. Agoyan, J.M. Dutertre, A.P. Mirbaha, D. Naccache, A.L. Ribotta, A. Tria, How to flip a bit? in 2010 IEEE 16th International On-Line Testing Symposium (IEEE, 2010), pp. 235–239
F. Zhang, X. Lou, X. Zhao, S. Bhasin, W. He, R. Ding, S. Qureshi, K. Ren, Persistent fault analysis on block ciphers, in IACR Transactions on Cryptographic Hardware and Embedded Systems (2018), pp. 150–172
K. Murdock, D. Oswald, F.D. Garcia, J. Van Bulck, D. Gruss, F. Piessens, Plundervolt: Software-based fault injection attacks against Intel SGX, in 41st IEEE Symposium on Security and Privacy (IEEE, 2020), pp. 1466–1482
M. Sabbagh, Y. Fei, D. Kaeli, A novel GPU overdrive fault attack, in 57th ACM/IEEE Design Automation Conference (IEEE, San francisco, USA, 2020), pp. 1–6
N. Moro, K. Heydemann, E. Encrenaz, B. Robisson, Formal verification of a software countermeasure against instruction skip attacks. J. Cryptogr. Eng. 4(3), 145–156 (2014)
S. Patranabis, A. Chakraborty, D. Mukhopadhyay, Fault tolerant infective countermeasure for AES. J. Hardware Syst. Secur. 1(1), 3–17 (2017)
C. Dobraunig, M. Eichlseder, T. Korak, S. Mangard, F. Mendel, R. Primas, SIFA: exploiting ineffective fault inductions on symmetric cryptography. IACR Trans. Cryptographic Hardware Embedded Syst. 547–572 (2018)
C. Dobraunig, M. Eichlseder, H. Gross, S. Mangard, F. Mendel, R. Primas, Statistical ineffective fault attacks on masked AES with fault countermeasures, in International Conference on the Theory and Application of Cryptology and Information Security (Springer, 2018), pp. 315–342
B. Gierlichs, J. Schmidt, M. Tunstall, Infective computation and dummy rounds: fault protection for block ciphers without check-before-output, in International Conference on Cryptology and Information Security in Latin America (Springer, 2012), pp. 305–321
X. Guo, D. Mukhopadhyay, C. Jin, R. Karri, Security analysis of concurrent error detection against differential fault analysis. J. Cryptogr. Eng. 5(3), 153–169 (2015)
A.R. Shahmirzadi, S. Rasoolzadeh, A. Moradi, Impeccable circuits II, in 57th ACM/IEEE Design Automation Conference (DAC) (2020), pp. 1–6
S. Saha, D. Jap, D.B. Roy, A. Chakraborti, S. Bhasin, D. Mukhopadhyay, A framework to counter statistical ineffective fault analysis of block ciphers using domain transformation and error correction. IEEE Trans. Inf. Forens. Secur. (2019)
J. Breier, M. Khairallah, X. Hou, Y. Liu, A countermeasure against statistical ineffective fault analysis. IACR Cryptology ePrint Archive 2019, 515 (2019). https://eprint.iacr.org/2019/515
O. Reparaz, L. De Meyer, B. Bilgin, V. Arribas, S. Nikova, V. Nikov, N. Smart, CAPA: the spirit of beaver against physical attacks, in Annual International Cryptology Conference (Springer, 2018), pp. 121–151
S. Patranabis, D. Mukhopadhyay, Fault tolerant architectures for cryptography and hardware security. (Springer, 2018)
L. De Meyer, V. Arribas Abril, S. Nikova, V. Nikov, V. Rijmen, M &M: Masks and macs against physical attacks. IACR Trans. Cryptogr. Hardware Embedded Syst. 2019(1), 25–50 (2018)
S. Saha, A. Bag, D.B. Roy, S. Patranabis, D. Mukhopadhyay, Fault template attacks on block ciphers exploiting fault propagation, in Annual International Conference on the Theory and Applications of Cryptographic Techniques (Springer, 2020). pp. 612–643
N. Bagheri, R. Ebrahimpour, N. Ghaedi, New differential fault analysis on PRESENT. EURASIP J. Adv. Signal Process. 2013(1), 1–10 (2013)
S. Ghosh, D. Saha, A. Sengupta, D.R. Chowdhury, Preventing fault attacks using fault randomization with a case study on AES, in Australasian conference on information security and privacy (Springer, 2015), pp. 343–355
B. Wang, L. Liu, C. Deng, M. Zhu, S. Yin, Z. Zhou, S. Wei, Exploration of benes network in cryptographic processors: A random infection countermeasure for block ciphers against fault attacks. IEEE Trans. Inf. Forens. Secur. 12(2), 309–322 (2016)
T. Simon, L. Batina, J. Daemen, V. Grosso, P.M.C. Massolino, K. Papagiannopoulos, F. Regazzoni, N. Samwel, Friet: An authenticated encryption scheme with built-in fault detection, in Annual International Conference on the Theory and Applications of Cryptographic Techniques (Springer, 2020), pp. 581–611
S.D. Kumar, S. Patranabis, J. Breier, D. Mukhopadhyay, S. Bhasin, A. Chattopadhyay, A. Baksi, A practical fault attack on arx-like ciphers with a case study on ChaCha20, in 2017 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC) (IEEE, 2017), pp. 33–40
H. Tupsamudre, S. Bisht, D. Mukhopadhyay, Destroying fault invariant with randomization, in International Workshop on Cryptographic Hardware and Embedded Systems (Springer, 2014), pp. 93–111
B. Yuce, N.F. Ghalaty, H. Santapuri, C. Deshpande, C. Patrick, P. Schaumont, Software fault resistance is futile: Effective single-glitch attacks, in 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC) (IEEE, 2016), pp. 47–58
S. Saha, S.N. Kumar, S. Patranabis, D. Mukhopadhyay, P. Dasgupta, ALAFA: Automatic leakage assessment for fault attack countermeasures, in Proceedings of the 56th Annual Design Automation Conference 2019 (ACM, 2019), p. 136
D. Clark, S. Hunt, P. Malacaria, Quantified interference: Information theory and information flow, in Workshop on Issues in the Theory of Security (2004)
P. Khanna, C. Rebeiro, A. Hazra, XFC: A framework for exploitable fault characterization in block ciphers, in 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC) (IEEE, (2017), pp. 1–6
S. Saha, D. Mukhopadhyay, P. Dasgupta, ExpFault: an automated framework for exploitable fault characterization in block ciphers. IACR Trans. Cryptogr. Hardware Embedded Syst. 242–276 (2018)
S. Saha, D. Jap, S. Patranabis, D. Mukhopadhyay, S. Bhasin, P. Dasgupta, Automatic characterization of exploitable faults: A machine learning approach. IEEE Trans. Inf. Forens. Secur. 14(4), 954–968 (2018)
J. Richter-Brockmann, A.R. Shahmirzadi, P. Sasdrich, A. Moradi, T. Güneysu, FIVER–robust verification of countermeasures against fault injections. IACR Trans. Cryptographic Hardware Embedded Syst. 447–473 (2021)
A. Baksi, S. Bhasin, J. Breier, M. Khairallah, T. Peyrin, S. Sarkar, S.M. Sim, DEFAULT: Cipher level resistance against differential fault attack, in 27th International Conference on the Theory and Application of Cryptology and Information Security (2021), pp. 124–156
V. Arribas, F. Wegener, A. Moradi, S. Nikova, Cryptographic fault diagnosis using VerFI, in 2020 IEEE International Symposium on Hardware Oriented Security and Trust (IEEE, 2020), pp. 229–240
S. Saha, A. Bag, D. Jap, D. Mukhopadhyay, S. Bhasin, Divided we stand, united we fall: Security analysis of some SCA+SIFA countermeasures against SCA-enhanced fault template attacks, in International Conference on the Theory and Application of Cryptology and Information Security (Springer, 2021), pp. 62–94
B. Timon, Non-profiled deep learning-based side-channel attacks with sensitivity analysis. IACR Trans. Cryptographic Hardware Embedded Syst. 107–131 (2019)
F. Wegener, T. Moos, A. Moradi, DL-LA: Deep learning leakage assessment: A modern roadmap for SCA evaluations. TCHES 2021, 552–598 (2021)
J. Kim, S. Picek, A. Heuser, S. Bhasin, A. Hanjalic, Make some noise. unleashing the power of convolutional neural networks for profiled side-channel analysis. IACR Trans. Cryptographic Hardware Embedded Syst. 148–179 (2019)
L. Masure, C. Dumas, E. Prouff, A comprehensive study of deep learning for side-channel analysis. IACR Trans. Cryptographic Hardware Embedded Syst. 348–375 (2020)
J. Cooper, E. DeMulder, G. Goodwill, J. Jaffe, G. Kenworthy, P. Rohatgi, Test vector leakage assessment (TVLA) methodology in practice, in International Cryptographic Module Conference (2013)
Y.Liu, L. Wei, B. Luo, Q. Xu, Fault injection attack on deep neural network, in 2017 IEEE/ACM International Conference on Computer-Aided Design (2017), pp. 131–138
S. Hong, P. Frigo, Y. Kaya, C. Giuffrida, T. Dumitraş, Terminal brain damage: Exposing the graceless degradation in deep neural networks under hardware fault attacks, in 28th USENIX Security Symposium (2019), pp. 497–514
Rakin, A.S., Chowdhuryy, M.H.I., Yao, F., Fan, D.: Deepsteal: Advanced model extractions leveraging efficient weight stealing in memories, in 2022 IEEE Symposium on Security and Privacy (IEEE, 2022), pp. 1157–1174
M. Moradi, B.J. Oakes, M. Saraoglu, A. Morozov, K. Janschek, J. Denil, Exploring fault parameter space using reinforcement learning-based fault injection, in 2020 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (IEEE, 2020), pp. 102–109
A. Baksi, S. Sarkar, A. Siddhanti, R. Anand, A. Chattopadhyay, Fault location identification by machine learning. Cryptology ePrint Archive (2020)
K. Sakiyama, Y. Li, M. Iwamoto, K. Ohta, Information-theoretic approach to optimal differential fault analysis. IEEE Trans. Inf. Forensics Secur. 7(1), 109–120 (2011)
C.M. Holmes, I. Nemenman, Estimation of mutual information for real-valued data with error bars and controlled bias. Phys. Rev. E 100(2), 022404 (2019)
L. Paninski, Estimation of entropy and mutual information. Neural Comput. 15(6), 1191–1253 (2003)
J.F. De Winter, D. Dodou, Five-point likert items: t-test versus Mann-Whitney-Wilcoxon (addendum added october 2012). Pract. Assess. Res. Eval. 15(1), 11 (2010)
S.S. Sawilowsky, R.C. Blair, A more realistic look at the robustness and type II error properties of the t-test to departures from population normality. Psychol. Bull. 111(2), 352 (1992)
H.M. Park, Comparing group means: t-tests and one-way ANOVA using Stata, SAS, R, and SPSS (2009)
S.M. Ross, Introduction to probability and statistics for engineers and scientists (Academic press, 2020)
T. Schneider, A. Moradi, Leakage assessment methodology, in International Workshop on Cryptographic Hardware and Embedded Systems (Springer, 2015), pp. 495–513
F.X. Standaert, How (not) to use Welch’s t-test in side-channel security evaluations, in International Conference on Smart Card Research and Advanced Applications (Springer, 2018), pp. 65–79
A. Moradi, B. Richter, T. Schneider, F.X. Standaert, Leakage detection with the \(\chi ^2\)-test. IACR Trans. Cryptographic Hardware Embedded Syst. 209–237 (2018)
W. Rawat, Z. Wang, Deep convolutional neural networks for image classification: A comprehensive review. Neural Comput. 29(9), 2352–2449 (2017)
A. Torfi, R.A. Shirvani, Y. Keneshloo, N. Tavaf, E.A. Fox, Natural language processing advancements by deep learning: A survey. arXiv preprint arXiv:2003.01200 (2020)
I. Goodfellow, Y. Bengio, A. Courville, Deep learning (MIT Press, 2016)
P.M. Pardalos, V. Rasskazova, M.N. Vrahatis, et al., Black Box Optimization, Machine Learning, and No-Free Lunch Theorems (Springer, 2021)
X. Zeng, T.R. Martinez, Distribution-balanced stratified cross-validation for accuracy estimation. J. Exp. Theor. Artif. Intell. 12(1), 1–12 (2000)
J.T. Roscoe, Fundamental research statistics for the behavioral sciences [by] John T. Roscoe. Holt, Rinehart and Winston (1975)
M. Kuhn, K. Johnson, et al., Applied Predictive Modeling, vol. 26. (Springer, 2013)
F. Chollet, et al., Keras documentation. keras.io (2015)
M. Abadi, P. Barham, J. Chen, Z. Chen, A. Davis, J. Dean, M. Devin, S. Ghemawat, G. Irving, M. Isard, et al., Tensorflow: A system for large-scale machine learning, in 12th USENIX Symposium on Operating Systems Design and Implementation (2016), pp. 265–283
S. Ioffe, C. Szegedy, Batch normalization: Accelerating deep network training by reducing internal covariate shift. arXiv preprint arXiv:1502.03167 (2015)
D.P. Kingma, J. Ba, Adam: A method for stochastic optimization. arXiv preprint arXiv:1412.6980 (2014)
A.P. Johnson, S. Patranabis, R.S. Chakraborty, D. Mukhopadhyay, Remote dynamic partial reconfiguration: A threat to internet-of-things and embedded security applications. Microprocessors Microsyst. 52, 131–144 (2017)
M. Abramovici, M.A. Breuer, A.D. Friedman, Digital systems testing and testable design, vol. 2 (Computer Science Press, New York, 1990)
S. Saha, D. Mukhopadhyay, P. Dasgupta, ExpFault (2018). https://cadforassurance.org/tools/sca/exp-fault/
A. Poschmann, A. Moradi, K. Khoo, C.W. Lim, H. Wang, S. Ling, Side-channel resistant crypto for less than 2,300 GE. J. Cryptol. 24(2), 322–345 (2011)
S. Saha, D. Jap, D. Basu Roy, A. Chakraborty, S. Bhasin, D. Mukhopadhyay, A framework to counter statistical ineffective fault analysis of block ciphers using domain transformation and error correction. IEEE Transactions on Information Forensics and Security 2020, 545 (2020)
Using the cryptographic service engine (CSE): An introduction to the CSE module (2011). http://cache.freescale.com/files/32bit/doc/app_note/AN4234.pdf
SHE—secure hardware extension functional specification version1.1 (rev 439) (2011). http://www.automotive-his.de
C. De Cannière, O. Dunkelman, M. Knežević, KATAN and KTANTAN—a family of small and efficient hardware-oriented block ciphers, in International Workshop on Cryptographic Hardware and Embedded Systems (Springer, 2009), pp. 272–288
J. Feng, H. Chen, Y. Li, Z.P. Jiao, W. Xi, A framework for evaluation and analysis on infection countermeasures against fault attacks. IEEE Trans. Inf. Forensics Secur. (2019)
A. Bogdanov, L.R. Knudsen, G. Leander, C. Paar, A. Poschmann, M.J. Robshaw, Y. Seurin, C. Vikkelsoe, PRESENT: An ultra-lightweight block cipher, in International Workshop on Cryptographic Hardware and Embedded Systems (Springer, 2007), pp. 450–466
C. Beierle, G. Leander, A. Moradi, S. Rasoolzadeh, CRAFT: Lightweight tweakable block cipher with efficient protection against DFA attacks. IACR Trans. Symmetric Cryptol. 2019(1), 5–45 (2019)
J. Daemen, C. Dobraunig, M. Eichlseder, H. Groß, F. Mendel, R. Primas, Protecting against statistical ineffective fault attacks. IACR Trans. Cryptographic Hardware Embedded Syst. 2020(3), 508–543 (2020)
M. Nageler, C. Dobraunig, M. Eichlseder, Information-combining differential fault attacks on DEFAULT, in Annual International Conference on the Theory and Applications of Cryptographic Techniques (Springer, 2022), pp. 168–191
V. Lomne, T. Roche, A. Thillard, On the need of randomness in fault attack countermeasures-application to AES, in 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography (IEEE, 2012), pp. 85–94
S. Patranabis, N. Datta, D. Jap, J. Breier, S. Bhasin, D. Mukhopadhyay, SCADFA: Combined SCA+DFA attacks on block ciphers with practical validations. IEEE Trans. Comput. 68(10), 1498–1510 (2019)
Fujitsu announces first single-chip solution for automotive hybrid instrument cluster with secure hardware extension (SHE). https://www.fujitsu.com/downloads/MICRO/fme/fujitsu-atlas-l-automotive-secure-hardware-extension.pdf
Acknowledgements
The authors would like to thank the anonymous reviewers for their insightful comments and suggestions for improving the paper. Debdeep Mukhopadhyay would also like to thank the Department of Science and Technology (DST), Govt of India, IHUB NTIHAC Foundation, C3i Building, IIT Kanpur, and Centre on HARDWARE-SECURITY ENTREPRENEURSHIP RESEARCH & DEVELOPMENT, Meity, India, for partially funding this work.
Author information
Authors and Affiliations
Corresponding author
Additional information
Communicated by Franşois-Xavier Standaert.
Publisher's Note
Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
Sayandeep Saha and Manaar Alam worked on this project while pursuing their Ph.D. at IIT Kharagpur
Rights and permissions
Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law.
About this article
Cite this article
Saha, S., Alam, M., Bag, A. et al. Learn from Your Faults: Leakage Assessment in Fault Attacks Using Deep Learning. J Cryptol 36, 19 (2023). https://doi.org/10.1007/s00145-023-09462-6
Received:
Revised:
Accepted:
Published:
DOI: https://doi.org/10.1007/s00145-023-09462-6