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A Cost-Shared Quantization Algorithm and Its Implementation for Multi-Standard Video Codecs

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Abstract

Due to the growing demand of digital convergence, there is a need to have a video encoder/decoder (codec) that is capable of supporting multiple video standards on a single platform. High Efficiency Video Coding (HEVC), successor to H.264/MPEG-4 AVC, is a new standard under development that aims to substantially improve coding efficiency compared to AVC High Profile. This paper presents an efficient architecture based on a resource sharing strategy that can perform the quantization operation of the emerging HEVC encoder and six other video encoders: H.264/AVC, AVS, VC-1, MPEG-2, MPEG-4, and Motion JPEG (MJPEG). Since HEVC is still in the drafting stage, the proposed architecture is designed in such a way that any final changes can be accommodated into the design. The proposed quantizer architecture is completely division-free, as the division operation is replaced by shift and addition operations for all the codecs. The design is implemented on an FPGA and later synthesized in CMOS 0.18 μm technology. While working at 190 MHz, the design can decode a 1080p HD video at up to 61 frames per second. The multi-codec architecture is also suitable for low-cost VLSI implementation.

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Acknowledgements

The authors would like to acknowledge funding support from the Natural Sciences and Engineering Research Council of Canada (NSERC) for this research work.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, University of Saskatchewan Saskatoon, Saskatchewan, Canada, S7N5A9

    Mousumi Das & Khan A. Wahid

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  1. Mousumi Das
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  2. Khan A. Wahid
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Correspondence to Khan A. Wahid.

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Das, M., Wahid, K.A. A Cost-Shared Quantization Algorithm and Its Implementation for Multi-Standard Video Codecs. Circuits Syst Signal Process 33, 177–195 (2014). https://doi.org/10.1007/s00034-013-9620-5

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