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Vlsi fully connected neural networks for the implementation of other topologies

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Artificial Neural Networks (IWANN 1991)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 540))

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Abstract

In this paper, we study the alternatives for the implementation of any topology through a fully connected neural network. This strategy is based in the fact that, by the moment, most of the programmable VLSI neural networks implement this topology although associated computations usesdifferent strategies like analog computations, systolic or sequential digital computations. An efficient correspondence between a fully connected neural network and any other type of network can be done following one of this strategies: transparent strategies, for which the network is processed independently of its own topology as a fully connected network, and specialized strategies, for which submatrices are taken into account for the acceleration of the computations. The differences between the two strategies is basically related to the balance between the speed of the recall phase, and the complexity of the hardware. Finally we present two chips that implement a sequential dynamics with probabilistic criteria that follow the two strategies and evaluate the advantages and drawbacks of each one.

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8. Bibliography

  1. C. Mead. "Analog VLSI and Neural Networks". Addison-Wesley 1989.

    Google Scholar 

  2. E. Vittoz, X Arreguit. "CMOS Implementation of Herault-Jutten Cells for Separation of Sources". Chapter 3 of "Analog VLSI Implementation of Neural Systems". Kluwer Ac. Pub. 1989.

    Google Scholar 

  3. H.P.Graf. P. de Vergar. "A CMOS Implementation of a Neural Network Model". Proc. of the Standford Conf. on Advanced Research in VLSI. MIT Press 1987.

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  4. M. Verleysen, D. Sirletty, A. Vandemeulebrocke, P.Jaspers. "Neural Networks for High Storage Content Addresable Memory". IEEE Journal of Solid State Circuits. May 1989.

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  5. J. Carrabina, J.C. Calderon, C. Perez-Vicente, E. Valderrama. "Efficient dynamics for the recall phase of neural networks”. Submitted for publication.

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  6. J. Hopfield, D.W. Tank. "Simple Neural Optimization Networks: An A/D Converter, Signal Decision Circuit and Linear Programming Circuit". IEEE Transactions on Circcuits and Systems, May 1986.

    Google Scholar 

  7. T. Kohonen. "Self-organizing and associative memory". 3rd Edition. Springer-Verlag, 1989.

    Google Scholar 

  8. M.I. Jordan. "Serial order: A Parallel Distributed Processing Approach". ICS Report 8604. University of California. May 1986

    Google Scholar 

  9. J. Carrabina. "High speed large neural networks". PhD Thesis. September 1991.

    Google Scholar 

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Alberto Prieto

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© 1991 Springer-Verlag Berlin Heidelberg

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Carrabina, J., Lisa, F., Avellana, N., Perez-Vicente, C.J., Valderrama, E. (1991). Vlsi fully connected neural networks for the implementation of other topologies. In: Prieto, A. (eds) Artificial Neural Networks. IWANN 1991. Lecture Notes in Computer Science, vol 540. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0035904

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  • DOI: https://doi.org/10.1007/BFb0035904

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-54537-8

  • Online ISBN: 978-3-540-38460-1

  • eBook Packages: Springer Book Archive

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