Abstract
This paper describes the parallelization of a deterministic iterative method for the placement of standard cell circuits in VLSI design. The programming environment is the implementation of the parallel programming language ParMod-C for workstation clusters. The essential steps for transforming the existing sequential program to a parallel program are shown. An emphasis is laid on the discussion of the usefulness of individual language concepts. The efficiency of the application is investigated by analyzing the speedup and the quality of computed solutions of the parallel program.
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Schnekenburger, T., Spruth, H. (1995). Parallelization of an iterative placement algorithm using ParMod-C. In: Hertzberger, B., Serazzi, G. (eds) High-Performance Computing and Networking. HPCN-Europe 1995. Lecture Notes in Computer Science, vol 919. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0046675
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DOI: https://doi.org/10.1007/BFb0046675
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