Abstract
In 1983 an Italian research program was begun for the design, simulation and construction of a multiprocessor image processing system. After a first phase devoted to the comparison of suggested and existing systems and to the definition of a set of benchmarks, a new system was defined. The structure of this new system is introduced here: it is based on a fine-grained pyramid of processors built up by means of a pyramidal cell implemented on a VLSI multiprocessor chip. The peculiarities and the capabilities of the processing element are highlighted. The complete hardware and software system has been fully designed and is described. A first working prototype has been built and is now operational.
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Cantoni, V., Di Gesu, V., Ferretti, M. et al. The PAPIA system. J VLSI Sign Process Syst Sign Image Video Technol 2, 195–217 (1991). https://doi.org/10.1007/BF00925466
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DOI: https://doi.org/10.1007/BF00925466