Abstract
High-efficiency scheduling algorithm ensures the high throughput rate of switching network and high utilization rate of bandwidth. In order to reduce the communication time delay and BER (Bit Error Rate) of data transmission, we improve the iSLIP scheduling algorithm and achieve a better performance of high speed switching system by using less FPGA resources.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
References
Teng, X.: Research of scheduling mechanism and wireless bandwidth allocation mechanism of on-board switching in Spatial Information Networks. National University of Defense Technology, November 18, 2009 (In Chinese)
Yoshigoe, K., Christensen, K., Jacob, A.: The RR/RR CICQ switch: hardware design for 10-Gbps link speed. In: IEEE International Performance, Computing and Communications Conference Proceedings, pp. 481–485 (2003)
Sun, H., Zhang, D., Zhang, S.: Implementation of round robin scheduling algorithm based on FPGA. J. Electron. Inf. Technol. 25(8), 1143–1147 (2003). (In Chinese)
Lei, C.: The Design and Simulation of Data Exchange System on Fibre Channel Switch. Huazhong University of Science & Technology, January 11, 2011 (In Chinese)
Shin, E.S., Mooney, V.J., Riley, G.F.: Round-robin arbiter design and generation. In: Proceedings of the International Symposium on System Synthesis, pp. 243–248 (2002)
Lai-xin, P., Zi, Y., Wen-dong, Z., Chang, T.: A novel scheduling algorithm based on longest queue detecting for CICQ switching fabrics. J. Electron. Inf. Technol. 17(6), 1457–1462 (2010). (In Chinese)
Mekkittikul, A., Mekeown, N.: A practical scheduling algorithm to achieve 100% through put in input-queued switches. In: Proceedings of IEEE Information, San Francisco, pp. 792–799, April 1998
Javidi, T., Magill, R., Hrabik, T.: A high-through put scheduling algorithm for a buffered crossbar switch fabric. In: ICC2001, pp. 555–557 (2001)
Acknowledgement
This research is supported by the Fundamental Research Funds for the Central Universities (No.FRF-TP-14-046A2), and also supported by the National Natural Science Foundation of P. R. China (No.61102060).
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2015 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Guang, Z., Lin, Y., Ming, Z., Yilan, M. (2015). The Improvement and Implementation of iSLIP Algorithm Based on FPGA. In: Yueming, L., Xu, W., Xi, Z. (eds) Trustworthy Computing and Services. ISCTCS 2014. Communications in Computer and Information Science, vol 520. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-47401-3_34
Download citation
DOI: https://doi.org/10.1007/978-3-662-47401-3_34
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-662-47400-6
Online ISBN: 978-3-662-47401-3
eBook Packages: Computer ScienceComputer Science (R0)