Abstract
Fractional-pixel motion compensation can greatly improve the compressing efficiency in video coding, while quarter-pixel interpolation also leads to a significant increment in computational complexity. This paper presents some techniques for efficient implementation of quarter-pixel interpolation in AVS-P2 on a fix-point digital signal processor (DSP). Firstly, the whole interpolation process is divided into five sub-processes from the DSP-oriented viewpoint. Then highly parallel software pipelines are designed for each sub-process with elaborately balancing the resources on each side of the CPU data path. A task-level optimization strategy is also applied to arrange the software pipelines. Finally, the simulated results demonstrate that the execution time of interpolation can be greatly reduced by using this specific design.
This work was supported in part by the National Natural Science Foundation of China under Grant Number 61201238 and 61201410, and the Fundamental Research Funds for the Central Universities under Grant Number HEUCFR1017.
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Yang, Z., Jiao, S., Liu, L. (2012). Efficient DSP Implementation of Fractional-Pixel Interpolation for AVS. In: Lin, W., et al. Advances in Multimedia Information Processing – PCM 2012. PCM 2012. Lecture Notes in Computer Science, vol 7674. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-34778-8_55
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DOI: https://doi.org/10.1007/978-3-642-34778-8_55
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