Abstract
Embedded devices used for spacecraft, satellites, and space stations are vulnerable to the effects of high-energy charged particles. To resolve single-event latch-up (SEL)-associated troubles more flexibly using limited hardware resources in a space environment, reconfigurable devices such as field programmable gate arrays (FPGAs) are suitable. However, such reconfigurable systems present the shortcoming that the circuit itself on the gate array is not robust. The configuration context on a configuration SRAM also suffers from single-event upsets (SEUs) and SELs. This paper therefore proposes an MEMS dynamic optically reconfigurable gate array that is usable under a space radiation environment. The technique enables rapid recovery of a programmable device that has been damaged by high-energy charged particles. It uses incorrect configuration data including some error bits that had been damaged by particles. The configuration data are transferred using wireless communications and are retained on an EEPROM/SRAM.
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Redant, S., Marec, R., Baguena, L., Liegeon, E., Soucarre, J., Van Thielen, B., Beeckman, G., Ribeiro, P., Fernandez-Leon, A., Glass, B.: Radiation Test Results on First Silicon in the Design Against Radiation Effects (DARE) Library. IEEE Trans. on Nuclear Science 52(5), 1550–1554 (2005)
Makihara, A., Sakaide, Y., Tsuchiya, Y., Arimitsu, T., Asai, H., Iide, Y., Shindou, H., Kuboyama, S., Matsuda, S.: Single-Event Effects in 0.18 um CMOS Commercial Processes. IEEE Trans. on Nuclear Science 50(6), 2135–2138 (2003)
Ikeda, N., Shindou, H., Iide, Y., Asai, H., Kubo, S., Matsuda, S.: Evaluation of the Errors of Commercial Semiconductor Devices in a Space Radiation Environment. Trans. of the Institute of Electronics, Information and Communication Engineers J88-B(1), 108–116 (2005)
Lin, Y., He, L.: Devices and architecture concurrent optimization for FPGA transient soft error rate. In: International Conference on Computer Aided Design (2007)
Stroud, C.E.: Reliability of Majority Voting Based VLSI Fault-Tolerant Circuits. IEEE Trans. on VLSI Systems 2(4), 516–521 (1994)
Radu, M., Pitica, D., Posteuca, C.: Reliability and failure analysis of voting circuits in hardware redundant design. In: International Symposium on Electronic Materials and Packaging, pp. 421–423 (2000)
Miller, G., Carmichael, C., Jet Propulsion Labs: Single-Event Upset Mitigation for Xilinx FPGA Block Memories, XILINX Application Note, Virtex-II FPGAs (2007)
Barbour, A.E.: A reconfigurable fault-tolerant system. In: Midwest Symposium on Circuits and Systems, pp. 189–194 (1992)
Peter, J.-L.: ECC design of a custom DRAM storage unit. In: IEEE VLSI Test Symposium, pp. 171–173 (1993)
Mumbru, J., Panotopoulos, G., Psaltis, D., An, X., Mok, F., Ay, S., Barna, S., Fossum, E.: Optically Programmable Gate Array. In: SPIE of Optics in Computing 2000, vol. 4089, pp. 763–771 (2000)
Yamaguchi, N., Watanabe, M.: Liquid crystal holographic configurations for ORGAs. Applied Optics 47(28), 4692–4700 (2008)
Seto, D., Watanabe, M.: A dynamic optically reconfigurable gate array - perfect emulation. IEEE Journal of Quantum Electronics 44(5), 493–500 (2008)
Watanabe, M., Kobayashi, F.: Dynamic Optically Reconfigurable Gate Array. Japanese Journal of Applied Physics 45(4B), 3510–3515 (2006)
Kubota, S., Watanabe, M.: Programmable Optically Reconfigurable Gate Array Architecture and its writer. Applied Optics 48(2), 302–308 (2009)
Yatagai, T.: Optical space-variant logic-gate array based on spatial encoding technique. Opt. Lett. 11, 260–262 (1986)
Fukushima, S., Kurokawa, T.: Programmable hybrid parallel processing for real-time digital logic operations. Opt. Lett. 12, 965–967 (1987)
Texas Instruments, DLP, http://www.ti.com/
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Seto, D., Watanabe, M. (2010). MEMS Dynamic Optically Reconfigurable Gate Array Usable under a Space Radiation Environment. In: Sirisuk, P., Morgan, F., El-Ghazawi, T., Amano, H. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2010. Lecture Notes in Computer Science, vol 5992. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-12133-3_14
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DOI: https://doi.org/10.1007/978-3-642-12133-3_14
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