Abstract
For ultra-low-power sensor networks, finite state machines are used for simple tasks where the system’s microprocessor would be overqualified. This allows the microprocessor to remain in a sleep state, thus saving energy. This paper presents a new architecture that is specifically optimized for implementing reconfigurable Finite State Machines: Transition-based Reconfigurable FSM (TR-FSM). The proposed architecture combines low use of resources with a (nearly) FPGA-like reconfigurability.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Hartenstein, R.: Coarse Grain Reconfigurable Architecture. In: Proceedings of the 2001 Conference on Asia South Pacific Design Automation, Yokohama, Japan, pp. 564–570 (2001)
Katz, R.H.: Contemporary Logic Design. The Benjamin/Cummings Publishing Company, Inc. (1994)
Rabaey, J.M., Chandrakasan, A., Nikolic, B.: Digital Integrated Circuits. Prentice Hall, Upper Saddle River (2003)
Bukowiec, A.: Synthesis of Finite State Machines for Programmable Devices Based on Multi-Level Implementation. PhD thesis, University of Zielona Gora, Poland (2008), http://zbc.uz.zgora.pl/Content/14528/PhD-ABukowiec.pdf (retrieved 2009-11-03)
Liu, Z., Arslan, T., Khawam, S., Lindsay, I.: A High Performance Synthesisable UnsymmetricaI Reconfigurable Fabric For Heterogeneous Finite State Machines. In: Proceedings of the ASP-DAC, January 18-21, vol. 1, pp. 639–644 (2005)
Milligan, G., Vanderbauwhede, W.: Implementation of Finite State Machines on a Reconfigurable Device. In: Proceedings of the second NASA/ESA Conference on Adaptive Hardware and Systems, Edinburgh, August 5-8, pp. 386–396 (2007)
McElvain, K.: LGSynth93 Benchmark Set: Version 4.0 (1993), http://www.cbl.ncsu.edu/pub/Benchmark_dirs/LGSynth93/
Lin, M.B.: On the design of fast large fan-in CMOS multiplexers. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 19(8), 963–967 (2000)
Alioto, M., Palumbo, G.: Interconnect-Aware Design of Fast Large Fan-In CMOS Multiplexers. IEEE Transactions on Circuits and Systems II: Express Briefs 54(6), 484–488 (2007)
Xilinx, Inc.: Virtex Series Configuration Architecture User Guide (XAPP151). v1.7 edn., October 20 (2004)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2010 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Glaser, J., Damm, M., Haase, J., Grimm, C. (2010). A Dedicated Reconfigurable Architecture for Finite State Machines. In: Sirisuk, P., Morgan, F., El-Ghazawi, T., Amano, H. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2010. Lecture Notes in Computer Science, vol 5992. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-12133-3_13
Download citation
DOI: https://doi.org/10.1007/978-3-642-12133-3_13
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-12132-6
Online ISBN: 978-3-642-12133-3
eBook Packages: Computer ScienceComputer Science (R0)