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Embedded Computer Systems: Architectures, Modeling, and Simulation

9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009, Proceedings

  • Conference proceedings
  • © 2009

Overview

Editors:
  1. Koen Bertels

    1. Delft University of Technology, Delft, The Netherlands

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  2. Nikitas Dimopoulos

    1. Department of Electrical and Computer Engineering, University of Victoria, Victoria, Canada

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  3. Cristina Silvano

    1. Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan, Italy

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  4. Stephan Wong

    1. Delft University of Technology, Delft, The Netherlands

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  • 18 papers carefully reviewed and selected from 52 submissions

Part of the book series: Lecture Notes in Computer Science (LNCS, volume 5657)

Part of the book sub series: Theoretical Computer Science and General Issues (LNTCS)

Included in the following conference series:

Conference proceedings info: SAMOS 2009.

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About this book

This book constitutes the refereed proceedings of the 9th International Workshop on Architectures, Modeling, and Simulation, SAMOS 2009, held on Samos, Greece, on July 20-23, 2009.

The 18 regular papers presented were carefully reviewed and selected from 52 submissions. The papers are organized in topical sections on architectures for multimedia, multi/many cores architectures, VLSI architectures design, architecture modeling and exploration tools.

In addition there are 14 papers from three special sessions which were organized on topics of current interest: instruction-set customization, reconfigurable computing and processor architectures, and mastering cell BE and GPU execution platforms.

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Table of contents (36 papers)

  1. Front Matter

    Download chapter PDF

  2. Beachnote

    1. What Else Is Broken? Can We Fix It?

      • Yale Patt
      Pages 1-1

  3. Architectures for Multimedia

    1. Programmable and Scalable Architecture for Graphics Processing Units

      • Carlos S. de La Lama, Pekka Jääskeläinen, Jarmo Takala
      Pages 2-11

    2. The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors

      • Paul M. Carpenter, Alex Ramirez, Eduard Ayguade
      Pages 12-23

    3. CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey

      • Yahya Jan, Lech Jozwiak
      Pages 24-35

    4. Programmable Accelerators for Reconfigurable Video Decoder

      • Tero Rintaluoma, Timo Reinikka, Joona Rouvinen, Jani Boutellier, Pekka Jääskeläinen, Olli Silvén
      Pages 36-47

    5. Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study

      • Narasinga Rao Miniskar, Elena Hammari, Satyakiran Munaga, Stylianos Mamagkakis, Per Gunnar Kjeldsberg, Francky Catthoor
      Pages 48-57

    6. Multiple Description Scalable Coding for Video Transmission over Unreliable Networks

      • Roya Choupani, Stephan Wong, Mehmet R. Tolun
      Pages 58-67

  4. Multi/Many Cores Architectures

    1. Evaluation of Different Multithreaded and Multicore Processor Configurations for SoPC

      • Sascha Uhrig
      Pages 68-77

    2. Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture

      • Roberto Giorgi, Zdravko Popovic, Nikola Puzovic
      Pages 78-87

    3. Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management

      • Roberto Airoldi, Fabio Garzia, Tapani Ahonen, Dragomir Milojevic, Jari Nurmi
      Pages 88-97

    4. A Multiprocessor Architecture with an Omega Network for the Massively Parallel Model GCA

      • Christian Schäck, Wolfgang Heenes, Rolf Hoffmann
      Pages 98-107

  5. VLSI Architectures Design

    1. Towards Automated FSMD Partitioning for Low Power Using Simulated Annealing

      • Nainesh Agarwal, Nikitas J. Dimopoulos
      Pages 108-117

    2. Radix-4 Recoded Multiplier on Quantum-Dot Cellular Automata

      • Ismo Hänninen, Jarmo Takala
      Pages 118-127

    3. Prediction in Dynamic SDRAM Controller Policies

      • Ying Xu, Aabhas S. Agarwal, Brian T. Davis
      Pages 128-138

    4. Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI

      • Shinichi Kato, Minoru Watanabe
      Pages 139-148

  6. Architecture Modeling and Exploration Tools

    1. Visualization of Computer Architecture Simulation Data for System-Level Design Space Exploration

      • Toktam Taghavi, Mark Thompson, Andy D. Pimentel
      Pages 149-160

    2. Modeling Scalable SIMD DSPs in LISA

      • Peter Westermann, Hartmut Schröder
      Pages 161-170

    3. NoGAP: A Micro Architecture Construction Framework

      • Per Karlström, Dake Liu
      Pages 171-180

    4. A Comparison of NoTA and GENESYS

      • Bernhard Huber, Roman Obermaisser
      Pages 181-192
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Other volumes

  1. Embedded Computer Systems: Architectures, Modeling, and Simulation

Editors and Affiliations

  • Delft University of Technology, Delft, The Netherlands

    Koen Bertels, Stephan Wong

  • Department of Electrical and Computer Engineering, University of Victoria, Victoria, Canada

    Nikitas Dimopoulos

  • Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan, Italy

    Cristina Silvano

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