Abstract
The Sesame modeling and simulation framework aims at early and thus efficient system-level design space exploration of embedded multimedia system architectures. So far, Sesame only supported performance evaluation when mapping a single application onto a (multi-processor) architecture at the time. But since modern multimedia embedded systems are increasingly multi-tasking, we need to address the modeling of effects of executing multiple applications concurrently in our system-level performance models. To this end, this paper conceptually describes two multi-application workload modeling techniques for the Sesame framework. One technique is based on the use of synthetic application workloads while the second technique deploys only real application workloads to model concurrent execution of applications. For illustrative purposes, we also present a preliminary case study in which a Motion-JPEG encoder application is executed concurrently with a small synthetic producer-consumer application.
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References
Keutzer, K., et al.: System level design: Orthogonalization of concerns and platform-based design. IEEE Trans. on CAD of Integrated Circuits and Systems 19 (2000)
Balarin, F., et al.: Metropolis: An integrated electronic system design environment. IEEE Computer 36 (2003)
Kogel, T., et al.: Virtual architecture mapping: A SystemC based methodology for architectural exploration of system-on-chip designs. In: SAMOS. Proc. of the Int. workshop on Systems, Architectures, Modeling and Simulation, pp. 138–148 (2003)
Kangas, T., et al.: UML-based multi-processor SoC design framework. ACM Trans. on Embedded Computing Systems 5, 281–320 (2006)
Pimentel, A.D., Erbas, C., Polstra, S.: A systematic approach to exploring embedded system architectures at multiple abstraction levels. IEEE Trans. on Computers 55, 99–112 (2006)
Kahn, G.: The semantics of a simple language for parallel programming. In: Proc. of the IFIP Congress 74 (1974)
de Kock, E.A., et al.: Yapi: Application modeling for signal processing systems. In: DAC. Proc. of the Design Automation Conference, pp. 402–405 (2000)
Geilen, M., Basten, T.: Reactive process networks. In: EMSOFT. Proc. of the 4th ACM International Conference on Embedded Software, pp. 137–146. ACM Press, New York (2004)
Dijk, H.W.v., Sips, H.J., Deprettere, E.F.: Context-aware process networks. In: ASAP. Proc. of the Int. Conf. on Application-specific Systems, Architectures, and Processors, pp. 6–16 (2003)
Gheorghita, S.V., Basten, T., Corporaal, H.: Application scenarios in streaming-oriented embedded system design. In: Proc. of the Int. Symposium in System-on-Chip (2006)
Nikolov, H., Stefanov, T., Deprettere, E.: Multi-processor system design with ESPAM. In: CODES-ISSS 2006. Proc. of the Int. Conf. on HW/SW Codesign and System Synthesis, pp. 211–216 (2006)
Kotsis, G.: A systematic approach for workload modeling for parallel processing systems. Parallel Computing 22, 1771–1787 (1997)
Feitelson, D.: Workload modeling for performance evaluation. In: Calzarossa, M.C., Tucci, S. (eds.) Performance 2002. LNCS, vol. 2459, pp. 114–141. Springer, Heidelberg (2002)
Skadron, K., Martonosi, M., August, D.I., Hill, M.D., Lilja, D.J., Pai, V.S.: Challenges in computer architecture evaluation. Computer 36, 30–36 (2003)
Eeckhout, L., Nussbaum, S., Smith, J., De Bosschere, K.: Statistical simulation: Adding efficiency to the computer designer’s toolbox. IEEE Micro 23, 26–38 (2003)
Varatkar, G., Marculescu, R.: On-chip traffic modeling and synthesis for MPEG-2 video applications. IEEE Trans. on Very Large Scale Integration Systems 12, 108–119 (2004)
Thid, R., Sander, I., Jantsch, A.: Flexible bus and NoC performance analysis with configurable synthetic workloads. In: Proc. of the Conference on Digital System Design, pp. 681–688 (2006)
Mahadevan, S., Angiolini, F., Storgaard, M., Olsen, R.G., Sparso, J., Madsen, J.: A network traffic generator model for fast network-on-chip simulation. In: DATE. Proc. of the Conference on Design, Automation and Test in Europe, pp. 780–785 (2005)
Liu, Y., Chakraborty, S., Ooi, W.T.: Approximate VCCs: a new characterization of multimedia workloads for system-level MpSoC design. In: DAC. Proc. of the conference on Design Automation, pp. 248–253 (2005)
Maxiaguine, A., Zhu, Y., Chakraborty, S., Wong, W-F.: Tuning SoC platforms for multimedia processing: identifying limits and tradeoffs. In: CODES-ISSS. Proc. of the Int. conference on Hardware/software codesign and system synthesis, pp. 128–133 (2004)
Gerstlauer, A., Yu, H., Gajski, D.D.: RTOS modeling for system level design. In: DATE. Proc. of the Conference on Design, Automation and Test in Europe, 10130 (2003)
Hessel, F., da Rosa, V.M., Reis, I.M., Planner, R., Marcon, C.A.M., Susin, A.A.: Abstract RTOS modeling for embedded systems. In: RSP 2004. Proc. of the 15th IEEE International Workshop on Rapid System Prototyping, pp. 210–216. IEEE Computer Society Press, Los Alamitos (2004)
Lavagno, L., et al.: A time slice based scheduler model for system level design. In: DATE. Proc. of the Conference on Design, Automation and Test in Europe, pp. 378–383 (2005)
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Thompson, M., Pimentel, A.D. (2007). Towards Multi-application Workload Modeling in Sesame for System-Level Design Space Exploration. In: Vassiliadis, S., Bereković, M., Hämäläinen, T.D. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2007. Lecture Notes in Computer Science, vol 4599. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-73625-7_24
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DOI: https://doi.org/10.1007/978-3-540-73625-7_24
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