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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 3254))

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Abstract

A novel constant-time fault-secure binary counter is presented. This counter is appropriate for performance aware safety critical systems. This is achieved due its ability to read its binary output on-the-fly. The safety scheme is based on parity prediction technique achieving concurrent on-line testing. The experimental results exhibit high levels of safe operation, keeping the performance of the Constant Time Binary Counter almost linear to its size increase, while area overhead is lower than that of any counter based on a multichannel technique.

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© 2004 Springer-Verlag Berlin Heidelberg

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Karatasos, D., Kakarountas, A., Theodoridis, G., Goutis, C. (2004). A Novel Constant-Time Fault-Secure Binary Counter. In: Macii, E., Paliouras, V., Koufopavlou, O. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2004. Lecture Notes in Computer Science, vol 3254. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30205-6_76

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  • DOI: https://doi.org/10.1007/978-3-540-30205-6_76

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-23095-3

  • Online ISBN: 978-3-540-30205-6

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