Abstract
A 32-bit ALU has been implemented in the baseline Philips-Motorola-ST 0.10um triple-VT CMOS technology. The ALU core has been designed with a combined dynamic/static design approach aiming at high-speed operation and standard cells based design. It runs at frequencies ranging from 3.8 GHz to 5.4 GHz (with nominal supply at room temperature) depending on the actual fabrication process corner.
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© 2004 Springer-Verlag Berlin Heidelberg
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Pessolano, F., Meijer, R.I.M.P. (2004). A 260ps Quasi-static ALU in 90nm CMOS. In: Macii, E., Paliouras, V., Koufopavlou, O. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2004. Lecture Notes in Computer Science, vol 3254. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30205-6_39
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DOI: https://doi.org/10.1007/978-3-540-30205-6_39
Publisher Name: Springer, Berlin, Heidelberg
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