Abstract
Recursion is a powerful method that is used to describe many algorithms in computer science. Processing of recursion is traditionally done using a stack, which can act as a bottleneck for parallelising and pipelining different stages of recursion. In this paper we propose a method for mapping recursive algorithms, without the use of a stack structure, into hardware by pipelining the stages of recursion. The use of runtime reconfigurable hardware to minimise the amount of required hardware resources, and the related issues to be resolved, are addressed.
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ElGindy, H., Ferizis, G. (2004). Mapping Basic Recursive Structures to Runtime Reconfigurable Hardware. In: Becker, J., Platzner, M., Vernalde, S. (eds) Field Programmable Logic and Application. FPL 2004. Lecture Notes in Computer Science, vol 3203. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30117-2_97
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DOI: https://doi.org/10.1007/978-3-540-30117-2_97
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-22989-6
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