Analog Signal Processing Reconfiguration for Systems-on-Chip Using a Fixed Analog Cell Approach

This work proposes the combination of a set of fixed identical analog cells and a programmable digital array to create an infrastructure for reconfigurable analog signal processing. The fixed analog cell (FAC) implements the frequency translation (mixing) concept of input signal, followed by its conversion to the ΣΔ domain. This approach makes possible the use of a constant analog block, and also a uniform treatment of input signals from DC to high frequencies with a significant advantage: no analog part tuning, sizing, or redesign required. The proposed topology allows easy integration with widely used fine grain FPGAs or general purpose SOC, and it is ideal to develop highly programmable mixed signal devices, since the tradeoffs among resolution, linearity, bandwidth and area can be developed at the user design time, and not at the FPGA design time like in other mixed-signal programmable arrays.

Authors and Affiliations

1. Informatics Institute, Universidade Federal do Rio Grande do Sul, 90035-190, Porto Alegre, Brazil

   Eric E. Fabris, Luigi Carro & Sergio Bampi

Editors and Affiliations

1. ITIV - Universitaet Karlsruhe (TH),  

   Jürgen Becker

2. University of Paderborn,  

   Marco Platzner

3. IMEC, Kapeldreef 75, Leuven, Leuven, Belgium

   Serge Vernalde

Reprints and permissions

© 2004 Springer-Verlag Berlin Heidelberg

Policies and ethics