Abstract.
Parallel implementation of the BLAS library for sparse matrix algorithms in computational linear algebra is a critical problem, especially on the shared memory architectures with finite memory bandwidth. In this study, we evaluate the performance of the cc-NUMA systems using low level multithreaded BLAS kernels. The performance of both the compiler and the systems are evaluated on two Intel processor based architectures, NEC TX7/AzusA and IBM xSeries 440.
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Nishida, A., Oyanagi, Y. (2003). Performance Evaluation of Low Level Multithreaded BLAS Kernels on Intel Processor Based cc-NUMA Systems. In: Veidenbaum, A., Joe, K., Amano, H., Aiso, H. (eds) High Performance Computing. ISHPC 2003. Lecture Notes in Computer Science, vol 2858. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39707-6_45
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DOI: https://doi.org/10.1007/978-3-540-39707-6_45
Publisher Name: Springer, Berlin, Heidelberg
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