Abstract
Demand-based flash translation layer is an efficient page-level flash translation layer, which can effectively reduce the RAM (Random Access Memory) footprint of NAND flash-based storage systems. However, this demand-based flash translation layer does not consider the spatial locality of workloads. In this paper, a new workload-aware page-level flash translation layer is proposed for NAND flash-based storage systems. The proposed flash translation layer maintains three caches in RAM to cache mapping entries, which are the on-demand mapping entry cache, frequent mapping entry cache, and dirty mapping entry cache. Considering both temporal locality and spatial locality of workloads, the on-demand mapping entry cache is designed to store the on-demand mapping entries and sequential mapping entries. Considering the access frequency of workloads, the frequent mapping entry cache is designed to cache the most frequently accessed mapping entries. To decrease the number of updates to translation pages, the dirty mapping entry cache is designed to cache the dirty mapping entries and flush the dirty mapping entries belonging to the same translation page to NAND flash memory in a batch mode. The experimental results show that the proposed flash translation layer performs better than existing page-level flash translation layers.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
References
Xia, Y., Zhou, M., Luo, X., Pang, S., Zhu, Q.: A stochastic approach to analysis of energy-aware DVS-enabled cloud datacenters. IEEE Trans. Syst. Man Cybern. Syst. 45(1), 73–83 (2015)
Fu, Z., Ren, K., Shu, J., Sun, X., Huang, F.: Enabling personalized search over encrypted outsourced data with efficiency improvement. IEEE Trans. Parallel Distrib. Syst. 27(9), 2546–2559 (2016)
Xia, Y., Zhou, M., Luo, X., Pang, S., Zhu, Q.: Stochastic modeling and performance analysis of migration-enabled and error-prone clouds. IEEE Trans. Ind. Inf. 11(2), 495–504 (2015)
Ren, Y., Shen, J., Wang, J., Han, J., Lee, S.: Mutual verifiable provable data auditing in public cloud storage. J. Internet Technol. 16(2), 317–323 (2015)
Guo, P., Wang, J., Geng, X.H., Kim, C.S., Kim, J.U.: A variable threshold-value authentication architecture for wireless mesh networks. J. Internet Technol. 15(6), 929–936 (2014)
Shen, J., Tan, H., Wang, J., Wang, J., Lee, S.: A novel routing protocol providing good transmission reliability in underwater sensor networks. J. Internet Technol. 16(1), 171–178 (2015)
Zhang, Q., Li, X., Wang, L., Zhang, T., Wang, Y., Shao, Z.: Lazy-RTGC: a real-time lazy garbage collection mechanism with jointly optimizing average and worst performance for NAND flash memory storage systems. ACM Trans. Design Autom. Electron. Syst. 20(3), Article No. 43 (2015)
Huang, M., Liu, Z., Qiao, L.: Asymmetric programming: a highly reliable metadata allocation strategy for MLC NAND flash memory-based sensor systems. Sensors 14(10), 18851–18877 (2014)
Nam, B.W., Na, G.J., Lee, S.W.: A hybrid flash memory SSD scheme for enterprise database applications. In: Proceedings of the 12th Asia-Pacific Web Conference, Busan, Korea, pp. 39–44 (2010)
Chung, T.S., Park, D.J., Park, S., Lee, D.H., Lee, S.W., Song, H.J.: A survey of flash translation layer. J. Syst. Archit. 55(5–6), 332–343 (2009)
Ma, D., Feng, J., Li, G.: A survey of address translation technologies for flash memories. ACM Comput. Surv. 46(3), Article No. 36 (2014)
Kwon, O., Koh, K., Lee, J., Bahn, H.: FeGC: an efficient garbage collection scheme for flash memory based storage systems. J. Syst. Softw. 84(9), 1507–1523 (2011)
Liao, J., Zhang, F., Li, L., Xiao, G.: Adaptive wear-leveling in flash-based memory. IEEE Comput. Archit. Lett. 14(1), 1–4 (2015)
Gupta, A., Kim, Y., Urgaonkar, B.: DFTL: a flash translation layer employing demand-based selective caching of page-level address mappings. ACM SIGPLAN Not. 44(3), 229–240 (2009)
Qin, Z., Wang, Y., Liu, D., Shao, Z.: A two-level caching mechanism for demand-based page-level address mapping in NAND flash memory storage systems. In: Proceedings of the 17th IEEE Real-Time and Embedded Technology and Applications Symposium, Chicago, IL, USA, pp. 157–166 (2011)
Chang, Y.H., Hsieh, J.W., Lin, J.H., Kuo, T.W.: A strategy to emulate NOR flash with NAND flash. ACM Trans. Storage. 6(2), Article No. 5 (2010)
Guan, Y., Wang, G., Wang, Y., Chen, R., Shao, Z.: BLog: block-level log-block management for NAND flash memorystorage systems. ACM SIGPLAN Not. 48(5), 111–120 (2013)
Park, S.O., Kim, S.J.: An efficient multimedia file system for NAND flash memory storage. IEEE Trans. Consum. Electron. 55(1), 139–145 (2009)
Liu, D., Wang, Y., Qin, Z., Shao, Z., Guan, Y.: A space reuse strategy for flash translation layers in SLC NAND flash memory storage systems. IEEE Trans. Very Large Scale Integr. VLSI Syst. 20(6), 1094–1107 (2012)
Kim, Y., Gupta, A., Urgaonkar, B.: A temporal locality-aware page-mapped flash translation layer. J. Comput. Sci. Technol. 28(6), 1025–1044 (2013)
Choudhuri, S., Givargis, T.: Performance improvement of block based NAND flash translation layer. In: Proceedings of International Conference on Hardware/Software Codesign and System Synthesis, pp. 257–262 (2007)
Lee, S.W., Park, D.J., Chung, T.S., Lee, D.H., Park, S., Song, H.J.: A log buffer-based flash translation layer using fully-associative sector translation. ACM Trans. Embed. Comput. Syst. 6(3), Article No. 18 (2007)
Kim, J., Kim, J.M., Noh, S.H., Min, S.L., Cho, Y.: A space-efficient flash translation layer for CompactFlash systems. IEEE Trans. Consum. Electron. 48(2), 366–375 (2002)
Kang, J.U., Jo, H., Kim, J.S., Lee, J.: A superblock-based flash translation layer for NAND flash memory. In: Proceedings of the 6th ACM and IEEE International Conference on Embedded Software, Seoul, Korea, pp. 161–170 (2006)
Lee, S., Shin, D., Kim, Y.J., Kim, J.: LAST: locality-aware sector translation for NAND flash memory-based storage systems. Oper. Syst. Rev. ACM 42(6), 36–42 (2008)
Shen, Z., Jia, Z., Li, X., Cai, X., Ju, L.: A data-driven superblock-based flash translation layer. Optik 126(20), 2735–2742 (2015)
Acknowledgments
This work was supported by the National Natural Science Foundation of China under Grant Nos. 61502102, 61402109, and 61502103; Natural Science Foundation of Fujian Province, China under Grant Nos. 2016J05149, 2015J05120, and 2017J01737; Fujian Provincial Key Laboratory of Network Security and Cryptology Research Fund (Fujian Normal University) (No. 15008); and Distinguished Young Scientific Research Talents Plan in Universities of Fujian Province (2017).
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2017 Springer International Publishing AG
About this paper
Cite this paper
Wang, H., Lin, M., Xiong, J., Lin, L., Xiao, R. (2017). Workload-Aware Page-Level Flash Translation Layer for NAND Flash-Based Storage Systems. In: Sun, X., Chao, HC., You, X., Bertino, E. (eds) Cloud Computing and Security. ICCCS 2017. Lecture Notes in Computer Science(), vol 10603. Springer, Cham. https://doi.org/10.1007/978-3-319-68542-7_49
Download citation
DOI: https://doi.org/10.1007/978-3-319-68542-7_49
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-68541-0
Online ISBN: 978-3-319-68542-7
eBook Packages: Computer ScienceComputer Science (R0)