Abstract
Authenticated Encryption (AE) schemes are an important security tool. Especially, GCM has been widely adopted on account of its performance and efficiency and used widely. As GCM has some weaknesses, SGCM has been proposed in 2011 and both AE schemes sometimes are used in the same system or hardware architecture. In this paper, we present the novel unified hardware for GCM and SGCM. Both modes are readily integrated into single architecture with little modification. The main contributions are three folded. Firstly, we unified GCM and SGCM using dual field adder. Secondly, we improved the previous dual field multiplier to fit our architecture. Our dual field multiplier just needs half cycles of referred one. For quantitative analysis, we calculate areas except for LEA core and add areas of AES which was used by each of previous works. We expect to achieve 29 % or 35 % less size than previous one. Lastly, we applied LEA instead of AES for the compact hardware implementation. Our unified hardware for GCM and SGCM is implemented within 16,133 GE and achieves 0.5 Gbps on 500 Mhz. Our unified hardware using LEA has 48 % less size than the one using AES.
This work was supported by the ICT R&D program of MSIP/IITP. [10043907, Development of high performance IoT device and Open Platform with Intelligent Software].
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References
AMPHION. Cs5265/75 aes simplex encryption/decryption cores, Dec 2013. http://www.chipdig.com/datasheets/parts/datasheet/554/CS5265-pdf.php
Feldhofer, M., Wolkerstorfer, J., Rijmen, V.: Aes implementation on a grain of sand. IEE Proc. Inf. Secur. 152(1), 13–20 (2005)
Ferguson, N.: Authnetication weaknesses in gcm. Comments submitted to NIST Modes of Operation Process (2005)
Großschädl, J.: A bit-serial unified multiplier architecture for finite fields gf (p) and gf (2m). In: Koç, Ç.K., Paar, C. (eds.) CHES 2001, pp. 202–219. Springer, New York (2001)
Hong, D., Lee, J.-K., Kim, D.-C., Kwon, D., Ryu, K.H., Lee, D.-G.: Lea: A 128-bit block cipher for fast encryption on common processors. In: Kim, Y., Lee, H., Perrig, A. (eds.) Information Security Applications, pp. 3–27. Springer, New York (2014)
Igoe, K., Solinas, J.: Aes galois counter mode for the secure shell transport layer protocol. Technical report, RFC 5647, August 2009
Lee, D., Kim, D.-C., Kwon, D., Kim, H.: Efficient hardware implementation of the lightweight block encryption algorithm lea. Sensors 14(1), 975–994 (2014)
O. L. P. Ltd., Ol_aes aes core family, Dec 2013. http://www.ocean-logic.com/pub/OL_AES.pdf
McGrew, D., Viega, J.: The galois/counter mode of operation (gcm). Submission to NIST (2004). http://csrc.nist.gov/CryptoToolkit/modes/proposedmodes/gcm/gcm-spec.pdf
McGrew, D., Viega, J.: The use of galois message authentication code (gmac) in ipsec esp and ah. Technical report, RFC 4543, May 2006
Moradi, A., Poschmann, A., Ling, S., Paar, C., Wang, H.: Pushing the limits: a very compact and a threshold implementation of AES. In: Paterson, K.G. (ed.) EUROCRYPT 2011. LNCS, vol. 6632, pp. 69–88. Springer, Heidelberg (2011)
Patel, P.: Parallel multiplier designs for the galois/counter mode of operation (2008)
Pramstaller, N., Mangard, S., Dominikus, S., Wolkerstorfer, J.: Efficient AES implementations on ASICs and FPGAs. In: Dobbertin, H., Rijmen, V., Sowa, A. (eds.) AES 2005. LNCS, vol. 3373, pp. 98–112. Springer, Heidelberg (2005)
Saarinen, M.-J.O.: Sgcm: the sophie germain counter mode. IACR Cryptology ePrint Archive 2011:326 (2011)
Salowey, J., Choudhury, A., McGrew, D.: Aes galois counter mode (gcm) cipher suites for tls. Technical report, RFC 5288 (Proposed Standard) (2008)
Satoh, A.: High-speed hardware architectures for authenticated encryption mode gcm. In: Proceedings of 2006 IEEE International Symposium on Circuits and Systems, 2006. ISCAS 2006, 4 pp., IEEE (2006)
Satoh, A., Morioka, S.: Hardware-focused performance comparison for the standard block ciphers AES, Camellia, and Triple-DES. In: Boyd, C., Mao, W. (eds.) ISC 2003. LNCS, vol. 2851, pp. 252–266. Springer, Heidelberg (2003)
Satoh, A., Morioka, S., Takano, K., Munetoh, S.: A compact rijndael hardware architecture with S-Box optimization. In: Boyd, C. (ed.) ASIACRYPT 2001. LNCS, vol. 2248, pp. 239–254. Springer, Heidelberg (2001)
Satoh, A., Sugawara, T., Aoki, T.: High-performance hardware architectures for galois counter mode. IEEE Trans. Comput. 58(7), 917–930 (2009)
Sava, E., Tenca, A.F., Koç, Ç.K.: A scalable and unified multiplier architecture for finite fields \(GF\)(\(p\)) and tex2html\_wrap\_inline111. In: Paar, C., Koç, Ç.K. (eds.) CHES 2000. LNCS, vol. 1965, pp. 277–292. Springer, Heidelberg (2000)
Tenca, A.F., Koç, Ç.K.: A scalable architecture for modular multiplication based on montgomery’s algorithm. IEEE Trans. Comput. 52(9), 1215–1221 (2003)
Tenca, A.F., Savas, E., Koç, C.: A design framework for scalable and unified multipliers in gf (p) and gf (2m). Int. J. Comput. Res. 13(1), 68–83 (2004)
Viega, J., McGrew, D.A.: The use of galois/counter mode (gcm) in ipsec encapsulating security payload (esp) (2005)
Wang, S.: An architecture for the AES-GCM security standard. Ph.D. thesis, University of Waterloo (2006)
Yang, B., Mishra, S., Karri, R.: A high speed architecture for galois/counter mode of operation (gcm). IACR Cryptology ePrint Archive, 2005:146 (2005)
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Lee, Y., Seo, H., Kim, H. (2015). The Unified Hardware Design for GCM and SGCM. In: Rhee, KH., Yi, J. (eds) Information Security Applications. WISA 2014. Lecture Notes in Computer Science(), vol 8909. Springer, Cham. https://doi.org/10.1007/978-3-319-15087-1_24
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DOI: https://doi.org/10.1007/978-3-319-15087-1_24
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