Abstract
Technological development in the field of system controllers (SC) for electric traction (ET) has increased exponentially in the recent years. Most notable are the SC that enable flexibility by programming algorithms specifically designed and adapted for efficiency and safety. This flexibility requirement usually leads to the elaboration of expensive ET systems, demands to implement quickly and efficiently a new method of control, new algorithms. To avoid the subsequent unwanted result, the higher cost of the newer systems, it is therefore essential to test the proper functioning of the new SC both quickly and realistically, but safely. Typically, the Hardware-in-Loop (HiL) method is used, where the ET, or its building blocks are simulated in a near to real environment. This method requires the fastest computing hardware, resulting in expensive devices with high power consumption and their own anomalies. This article considers only a part of the HiL, the fast-computing equipment, usually based on Field Programmable Gate Arrays (FPGA). This novel method for mathematical treatment is expected to be efficient but economical and can provide quick results for an almost infinite number of elements computed in Real Time (RT). The new method is based on “analogue computing” building blocks, that permit a new reconfigurable algorithm made part of the HiL. This analogue-computing based system that is proposed here has neither similar to the well-known analogue computers of the 1940s–1950s, nor is the Simulink of Matlab program. Just the opposite, the proposed fast computing inside the HiL is proposed as a substitution of the classic decimal mathematical form of computation, as is the FPGA. This new calculation method, when included in the HiL is expected to bring a high precision and be highly immune to interferences.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
References
Ma, B., Bashir, M.F., Peng, X., Strielkowski, W., Kirikkaleli, D.: Analyzing research trends of universities’ carbon footprint: an integrated review. Gondwana Res. 121, 259–275 (2023). 1.1 Study background. Elsevier, September. https://doi.org/10.1016/j.gr.2023.05.008
Li, Y., Liang, C., Ye, F., Zhao, X.: Designing government subsidy schemes to promote the electric vehicle industry: a system dynamics model perspective. Transp. Res. Part A: Pol. Pract. 167, 103558, 1–2 (2023). https://doi.org/10.1016/j.tra.2022.11.018
Gong, W., Liu C., (Member, IEEE), Zhao, X., Xu, S. (Senior Member, IEEE): A model review for controller-hardware-in-the-loop simulation in EV powertrain application. IEEE Trans. Transp. Electrific. 1--10 (2023). https://doi.org/10.1109/TTE.2023.3290999
Milovanovic´, S. (Member, IEEE), Strobl, S., Ladoux, P. (Member, IEEE), Dujic, D. (Senior Member, IEEE): Hardware-in-the-loop modeling of an actively fed MVDC railway systems of the future. IEEE Access J. 9, 151493–151504 (2021). https://doi.org/10.1109/ACCESS.2021.3125050
The surprising story of the first microprocessors. https://spectrum.ieee.org/the-surprising-story-of-the-first-microprocessors
Bars, R., et al.: Theory, algorithms and technology in the design of control systems. Ann. Rev. Control 30, 19–30 (2006). https://doi.org/10.1016/j.arcontrol.2006.01.006
Isermann, R., Schaffnit, J., Sinsel, S.: Hardware-in-the-loop simulation for the design and testing of engine-control systems. Control Eng. Pract. 7(5), 643–653 (1999). https://doi.org/10.1016/S0967-0661(98)00205-6
Isermann, J.S., Sinsel, S.: Hardware-in-the-loop simulation for the design and testing of engine-control systems. IFAC Proc. Vol. 31(4), 1–10 (1998). https://doi.org/10.1016/S1474-6670(17)42125-2
Lee, J.S. (Member, IEEE), Choi, G. (Member, IEEE): Modeling and hardware-in-the-loop system realization of electric machine drives – a review. CES Trans. Electr. Mach. Syst. 5(3), 194–202 (2021). CES
Labview. https://www.ni.com/pt-pt/shop/product/hil-and-real-time-test-software-suite.html
Typhoon. https://www.typhoon-hil.com/
OPAL-RT. https://www.opal-rt.com/
Le, N.D., Linh, L.Q., Cong, N.T.H., Vu, P., Nguyen, T.L.: Field-programmable gate array-based field-oriented control for permanent magnet synchronous motor drive. TELKOMNIKA Telecommun. Comput. Electron. Control 21(2), 448–458 (2023). TELKOMNIKA journal, April. https://doi.org/10.12928/TELKOMNIKA.v21i2.23560
Gopalan, A.: Analog calculator. In: MIT - Massachusetts Institute of Technology 6.101 Spring 2018, Project report from May (2018)
Zhang, R., Uetake, N., Nakada, T., Nakashima, Y.: Design of programmable analog calculation unit by implementing support vector regression for approximate computing. In: IEEE Micro 38(6), 73–82 (2018). https://doi.org/10.1109/MM.2018.2873953
Texas Instruments high-speed Op Amps. https://www.ti.com/amplifier-circuit/op-amps/high-speed/overview.html
World’s First Exascale Supercomputer. https://www.amd.com/en/press-releases/2022-05-30-world-s-first-exascale-supercomputer-powered-amd-epyc-processors-and-amd
Wikipedia, Frontier. https://en.wikipedia.org/wiki/Frontier_(supercomputer)
New scientist. https://www.newscientist.com/article/2346074-ibm-unveils-worlds-largest-quantum-computer-at-433-qubits/
The conversation. https://theconversation.com/could-energy-efficiency-be-quantum-computers-greatest-strength-yet-191989
How much electricity does a typical nuclear power plant generate? https://www.americangeosciences.org/critical-issues/faq/how-much-electricity-does-typical-nuclear-power-plant-generate
Mytic Analog Matrix Processor. https://mythic.ai/product/
Zhang, R., Nakada, T., Nakashima, Y.: Programmable analog calculation unit with two-stage architecture: a solution of efficient vector-computation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. E102–A(7), 878–885 (2019). https://doi.org/10.1587/transfun.E102.A.878
Zangeneh-Nejad, F., Sounas, D.L., Alù, A., Fleury, R.: Analogue computing with metamaterials. Nat. Rev. Mat. (2020). https://doi.org/10.1038/s41578-020-00243-2
Li, Y., et al.: Memristive field-programmable analog arrays for analog. In: Advanced Materials, Research Article 35, 2206648, pp.1–8, Advanced Materials published by Wiley-VCH GmbH (2023). https://doi.org/10.1002/adma.202206648
Mudrov, M., Zyuzev, A., Nesterov, K., Valtchev, S., Valtchev, S.: Hardware-in-the-loop system numerical methods evaluation based on brush DC-motor model. In: 2017 International Conference on Optimization of Electrical and Electronic Equipment (OPTIM) & 2017 International Aegean Conference on Electrical Machines and Power Electronics (ACEMP), pp. 428–433 (2017). https://doi.org/10.1109/OPTIM.2017.7975007
Mudrov, M., Zyuzev, A., Nesterov, K., Valtchev, S.: FPGA-based Hardware-in-the-Loop system bits capacity evaluation based on induction motor model. In: 2017 IEEE International Conference on Environment and Electrical Engineering and 2017 IEEE Industrial and Commercial Power Systems Europe (EEEIC/I&CPS Europe), pp. 1–5 (2017). https://doi.org/10.1109/EEEIC.2017.7977827
Mudrov, M., Ziuzev, A., Nesterov, K., Valtchev, S.: Power electrical drive Power-Hardware-in-the-Loop system. In: International Conference on Electrical Power Drive Systems ICEPDS (2018). https://doi.org/10.1109/ICEPDS.2018.8571801, Novocherkask, Russia
Mudrov, M., Ziuzev, A., Nesterov, K., Valtchev, S.: Asynchronous electric drive power-hardware-in-the-loop system. In: 17th International Ural Conference on AC Electric Drives (ACED) (2018). https://doi.org/10.1109/ACED.2018.8341722. Ekaterinburg, Russia
Mudrov, M., Ziuzev, A., Nesterov, K., Valtchev, S.: Electric drives power-hardware-in-the-loop system structures. In: 20th European Conference on Power Electronics and Applications (EPE'18 ECCE Europe), pp. P1–P7, Electronic ISBN: 978-9-0758-1528-3, USB ISBN: 978-9-0758-1529-0, Print on Demand (PoD) ISBN: 978-1-5386-4145-3, Riga (2018)
Mudrov, M., Ziuzev, A., Nesterov, K., Valtchev, S.: DC electrical drive Power-Hardware-in-the-Loop system. In: 45th International IECON´19 Conference, pp. 5333–5337, Lisbon (2019). https://doi.org/10.1109/IECON.2019.8927613
Acknowledgements
This research was funded (in part) by the Portuguese FCT program, Center of Technology and Systems (CTS) UIDB/00066/2020/UIDP/00066/2020.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2024 IFIP International Federation for Information Processing
About this paper
Cite this paper
Luis, B., Valtchev, S. (2024). A Novel Analogue Computing System in HiL for Electric Traction. In: Camarinha-Matos, L.M., Ferrada, F. (eds) Technological Innovation for Human-Centric Systems. DoCEIS 2024. IFIP Advances in Information and Communication Technology, vol 716. Springer, Cham. https://doi.org/10.1007/978-3-031-63851-0_25
Download citation
DOI: https://doi.org/10.1007/978-3-031-63851-0_25
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-031-63850-3
Online ISBN: 978-3-031-63851-0
eBook Packages: Computer ScienceComputer Science (R0)