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Systematic Design Procedure of CMOS Microelectrode-Arrays Based on Analog Signal Processing Noise Figure

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Biomedical Engineering Systems and Technologies (BIOSTEC 2021)

Abstract

Microelectrode-Arrays (MEAs) allow neural recording of thousands of neurons/mm2 by sensing: Extracellular Action Potentials (EAP) and Local Field Potentials (LFP). MEAs arrange several recording sites (or pixels) in a spatial grid/matrix, planarly and capacitively coupled with in-vitro cell cultures (growth above the chip surface) and/or integrated in electrocorticography grids. This paper focuses on Electrolyte-Oxide (C)MOS Field-Effect-Transistors MEAs for cell-level recording. In this type of biosensors, each single row of the matrix is composed of N planar metal electrodes and is scanned synchronously and regularly for N clock cycles, adopting Time-Division-Multiplexing (TDM) schemes. TDM approach generates an analogue output signal for each biosensor row, which includes in a single time track the information acquired by the N electrodes of the matrix.

It is therefore of fundamental importance to estimate the noise power of the output signal of the single row because this power defines the minimum detectable threshold of the neuro-potential signal power.

Noise in planar MEA is determined by the classical contributions of electronic noise (thermal and flicker, coming from both biological environment and semiconductor devices) and from the spurious corrupting signal due to multiplexing action (which behaves to all effects as a statistical noise signal following a Gaussian probability distribution).

This paper presents the complete procedure for designing an (active) biosensor matrix/array (embedding the analog signal processing channels) as a function of a specific Noise Figure requirement (that measures the Signal-to-Noise-Ratio (SNR) degradation and thus is defined as the ratio between the biosensor array input SNR and the output SNR of the analog acquisition channel).

This procedure is applied to a single row of the biosensor matrix, can be easily extended to 2D array, and allows to define all the design parameters (including electrode area, gain, bandwidth and noise power of the analog stages building the array) to obtain the specific Noise Figure.

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Acknowledgments

This work has been partially supported by the Brain28 PRIN Project.

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Correspondence to Marcello De Matteis .

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De Matteis, M., Baschirotto, A., Stevenazzi, L., Vallicelli, E. (2022). Systematic Design Procedure of CMOS Microelectrode-Arrays Based on Analog Signal Processing Noise Figure. In: Gehin, C., et al. Biomedical Engineering Systems and Technologies. BIOSTEC 2021. Communications in Computer and Information Science, vol 1710. Springer, Cham. https://doi.org/10.1007/978-3-031-20664-1_1

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  • DOI: https://doi.org/10.1007/978-3-031-20664-1_1

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