Abstract
State-of-the-art FPGAs are just capable of implementing PCI bus initiator and target functions at the original bus speed of 33 MHz. This paper reports on the use of a Xilinx 4000 series FPGA and LogiCore macros to implement a fully compliant PCI card for a specialist data acquisition application. The design required careful performance analysis and manual intervention during the design process to ensure successful operation.
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References
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© 1997 Springer-Verlag Berlin Heidelberg
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Robinson, D., Lysaght, P., McGregor, G., Dick, H. (1997). Performance evaluation of a full speed PCI initiator and target subsystem using FPGAs. In: Luk, W., Cheung, P.Y.K., Glesner, M. (eds) Field-Programmable Logic and Applications. FPL 1997. Lecture Notes in Computer Science, vol 1304. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-63465-7_209
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DOI: https://doi.org/10.1007/3-540-63465-7_209
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