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Optimizing the NAS parallel BT application for the POWER CHALLENGEarray

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Applied Parallel Computing Industrial Computation and Optimization (PARA 1996)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1184))

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Abstract

The POWER CHALLENGEarray is a coarse-grained collection of large processor SMP nodes. This creates interesting parallelization opportunities for scalable applications. The NAS BT benchmark is a classical ADI-like application with non-trivial communication requirements. The coarse-grained distributed feature of the POWER CHALLENGEarray provides unique parallelization strategies. We explore the implementation of this benchmark on this machine and discuss the general implications for scalable application development

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References

  1. POWER CHALLENGEarray Technical Report, PWR-CHALL-ARA-TR (1/96), Silicon Graphics, Inc.,1996.

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Jerzy Waśniewski Jack Dongarra Kaj Madsen Dorte Olesen

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© 1996 Springer-Verlag Berlin Heidelberg

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Brown, J., Zagha, M. (1996). Optimizing the NAS parallel BT application for the POWER CHALLENGEarray. In: Waśniewski, J., Dongarra, J., Madsen, K., Olesen, D. (eds) Applied Parallel Computing Industrial Computation and Optimization. PARA 1996. Lecture Notes in Computer Science, vol 1184. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-62095-8_13

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  • DOI: https://doi.org/10.1007/3-540-62095-8_13

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-62095-2

  • Online ISBN: 978-3-540-49643-4

  • eBook Packages: Springer Book Archive

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