Abstract
This paper describes a methodology for machine-description, intended to help develop processor specific tools in a generic and reusable way. It is based on our work about retargetable compiler for embedded processors and is contributed to Architecture Design Language (ADL). The processor described in our machine-description system is modeled in UML class diagram in 3-layer architecture. The resulting machine-description is reusable for developers to create retargetable compilers.
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© 2005 Springer-Verlag Berlin Heidelberg
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Wu, D., Wang, Z., Dai, K. (2005). Retargetable Machine-Description System: Multi-layer Architecture Approach. In: Zhuge, H., Fox, G.C. (eds) Grid and Cooperative Computing - GCC 2005. GCC 2005. Lecture Notes in Computer Science, vol 3795. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11590354_138
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DOI: https://doi.org/10.1007/11590354_138
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-30510-1
Online ISBN: 978-3-540-32277-1
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