Abstract
Increased power density, hot-spots, and temperature gradients are severe limiting factors for today’s state-of-the-art microprocessors. However, the flexibility offered by the multiple cores in future Chip Multiprocessors (CMPs) results in a great opportunity for controlling the chip thermal characteristics. When a process is to be assigned to a core, a thermal-aware scheduling policy may be invoked to determine which core is the most appropriate.
In this paper we present TSIC, Thermal SImulator for CMPs, which is a fully parameterizable, user-friendly tool that allows us to easily test different CMP configurations, application characteristics, and scheduling policies. We also present a case study where the use of TSIC together with simple thermal-aware scheduling policies allows us to conclude that there is potential for improving the thermal behavior of a CMP by implementing new process scheduling policies.
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References
Mudge, T.: Power: A First Class Architectural Design Constraint. IEEE Computer 34, 52–57 (2001)
Skadron, K., Stan, M.R., Huang, W., Velusamy, S., Sankaranarayanan, K., Tarjan, D.: Temperature-Aware Microarchitecture: Extended Discussion and Results. Technical Report TR-CS-2003-08, University of Virginia (2003)
Huangy, W., Luy, Z., Ghoshy, S., Lachy, J., Stany, M., Skadron, K.: The Importance of Temporal and Spatial Temperature Gradients in IC Reliability Analysis. Technical Report TR-CS2004-07, University of Virginia (2004)
Li, Y., Brooks, D., Hu, Z., Skadron, K.: Performance, Energy, and Thermal Considerations for SMT and CMP Architectures. In: Proc. of the 11th IEEE International Symposium on High Performance Computer Architecture (HPCA), pp. 71–82 (2005)
Heo, S., Barr, K., Asanovic, K.: Reducing Power Density through Activity Migration. In: Proc. of the 2003 International Symposium on Low Power Electronics and Design, pp. 217–222 (2003)
ElEssawy, W., Albonesi, D.H.: A Microarchitectural Level Step Power Analysis Tool. In: Proc. of the 2002 international symposium on Low power electronics and design, pp. 263–266 (2002)
Lee, K.J., Skadron, K.: Using Performance Counters for Runtime Temperature Sensing in High-Performance Processors. In: Proc. of the Workshop on High-Performance, Power-Aware Computing (HP-PAC), pp. 232–239 (2005)
Brooks, D., Martonosi, M.: Dynamic Thermal Management for High-Performance Micro-processors. In: Proc. of the 7th IEEE International Symposium on High Performance Computer Architecture (HPCA), pp. 171–182 (2001)
Srinivasan, J., Adve, S.V.: Predictive Dynamic Thermal Management for Multimedia Applications. In: Proc. 17th International Conference Supercomputing, pp. 109–120 (2003)
Magklis, G., Scott, M.L., Semeraro, G., Albonesi, D.H., Dropsho, S.: Profile-based Dynamic Voltage and Frequency Scaling for a Multiple Clock Domain Microprocessor. In: Proc. of the 30th annual International Symposium on Computer Architecture, pp. 14–27 (2003)
Chaparro, P., Gonzalez, J., Gonzalez, A.: Thermal-Aware Clustered Microarchitectures. In: Proc. of the 2004 IEEE International Conference on Computer Design, pp. 48–53 (2004)
Deeney, J.: Thermal modeling and measurement of large high power silicon devices with asymmetric power distribution. In: Proc. of the 2002 Symposium on Microelectronics (2002)
Lall, B.S., Guenin, B.M., Molnar, R.J.: Methodology for Thermal Evaluation of Multichip Modules. IEEE Transactions on Components, Packaging and Manufacturing Technology 18, 72–79 (1995)
Kalla, R., Sinharoy, B., Tendler, J.M.: IBM Power5 Chip: A Dual-Core Multithreaded Processor. IEEE Computer 24, 40–47 (2004)
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Stavrou, K., Trancoso, P. (2005). TSIC: Thermal Scheduling Simulator for Chip Multiprocessors. In: Bozanis, P., Houstis, E.N. (eds) Advances in Informatics. PCI 2005. Lecture Notes in Computer Science, vol 3746. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11573036_56
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DOI: https://doi.org/10.1007/11573036_56
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-29673-7
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