Abstract
transyt is a BDD-based tool specifically designed for the verification of timed and untimed asynchronous concurrent systems. transyt system architecture is designed to be modular, open and flexible, such that additional capabilities can be easily integrated. A state of the art BDD package [1] is integrated into the system, and a middleware extension [2] provides support complex BDD manipulation strategies.
Ministry of Science and Technology TIN 2004-07739-C02-01 and grant AP2001-2819.
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Pastor, E., Peña, M.A., Solé, M. (2005). TRANSYT:A Tool for the Verification of Asynchronous Concurrent Systems. In: Etessami, K., Rajamani, S.K. (eds) Computer Aided Verification. CAV 2005. Lecture Notes in Computer Science, vol 3576. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11513988_42
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DOI: https://doi.org/10.1007/11513988_42
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