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"Ravel-XL: a hardware accelerator for assigned-delay compiled-code logic ..."

Michael A. Riepe et al. (1996)

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DOI: 10.1109/92.486085

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - https://dblp.org/rec/journals/tvlsi/RiepeSSB96
Michael A. Riepe, João P. Marques Silva, Karem A. Sakallah, Richard B. Brown:
Ravel-XL: a hardware accelerator for assigned-delay compiled-code logic gate simulation. IEEE Trans. Very Large Scale Integr. Syst. 4(1): 113-129 (1996)

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