default search action

combined dblp search
author search
venue search
publication search

ask others

"Inexact Signed Wallace Tree Multiplier Design Using Reversible Logic."

Sithara Raveendran et al. (2021)

> Home

Details and statistics

DOI: 10.1109/ACCESS.2021.3100892

access: open

type: Journal Article

metadata version: 2021-08-12

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/access/RaveendranEBV21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/access/RaveendranEBV21
Sithara Raveendran, Pranose J. Edavoor, Nithin Kumar Yernad Balachandra, M. H. Vasantha:
Inexact Signed Wallace Tree Multiplier Design Using Reversible Logic. IEEE Access 9: 108119-108130 (2021)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.