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"FPGA Implementation of Square and Cube Architecture Using Vedic Mathematics."

Sampada Barve et al. (2018)

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DOI: 10.1109/ISES.2018.00012

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-06

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  dblp key:
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Sampada Barve, Sithara Raveendran, Charudatta Korde, Trilochan Panigrahi, Nithin Y. B. Kumar, M. H. Vasantha:
FPGA Implementation of Square and Cube Architecture Using Vedic Mathematics. iSES 2018: 6-10

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