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"Exploiting binary translation for fast ASIP design space exploration on FPGAs."

Sebastiano Pomata et al. (2012)

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DOI: 10.1109/DATE.2012.6176533

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/date/PomataMTRL12
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  persistent URL:
  - https://dblp.org/rec/conf/date/PomataMTRL12
Sebastiano Pomata, Paolo Meloni, Giuseppe Tuveri, Luigi Raffo, Menno Lindwer:
Exploiting binary translation for fast ASIP design space exploration on FPGAs. DATE 2012: 566-569

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