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"Circuit optimization using statistical static timing analysis."

Aseem Agarwal et al. (2005)

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DOI: 10.1145/1065579.1065663

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  dblp key:
  - conf/dac/AgarwalCBZ05
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  - https://dblp.org/rec/conf/dac/AgarwalCBZ05
Aseem Agarwal, Kaviraj Chopra, David T. Blaauw, Vladimir Zolotov:
Circuit optimization using statistical static timing analysis. DAC 2005: 321-324

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