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"A Parallel VLSI Architecture for Layered Decoding for Array LDPC Codes."

Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary (2007)

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DOI: 10.1109/VLSID.2007.19

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/vlsid/GunnamCY07
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/GunnamCY07
Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary:
A Parallel VLSI Architecture for Layered Decoding for Array LDPC Codes. VLSI Design 2007: 738-743

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