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Eric A. M. Klumperink
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2020 – today
- 2023
- [j78]Joep Zanen
, Eric A. M. Klumperink
A Predistortion-Less Digital MIMO Transmitter With DTC-Based Quadrature Imbalance Compensation. IEEE J. Solid State Circuits 58(8): 2214-2225 (2023) - 2022
- [j77]Vijaya Kumar Purushothaman
Low-Power High-Linearity Mixer-First Receiver Using Implicit Capacitive Stacking With 3× Voltage Gain. IEEE J. Solid State Circuits 57(1): 245-259 (2022) - [j76]Leonid Belostotski
Figures of Merit for CMOS Low-Noise Amplifiers and Estimates for Their Theoretical Limits. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 734-738 (2022) - 2021
- [j75]Vijaya Kumar Purushothaman
Multi-Receiver Cross-Correlation Technique for (B)FSK Radios. IEEE Access 9: 96791-96798 (2021) - [j74]Sajad Golabighezelahmad
A 0.7-5.7 GHz Reconfigurable MIMO Receiver Architecture for Analog Spatial Notch Filtering Using Orthogonal Beamforming. IEEE J. Solid State Circuits 56(5): 1527-1540 (2021) - [j73]Bart J. Thijssen
2.4-GHz Highly Selective IoT Receiver Front End With Power Optimized LNTA, Frequency Divider, and Baseband Analog FIR Filter. IEEE J. Solid State Circuits 56(7): 2007-2017 (2021) - [j72]Joep Zanen
Power Efficiency Model for MIMO Transmitters Including Memory Polynomial Digital Predistortion. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1183-1187 (2021) - [j71]Pieter-Tjerk de Boer
Simplified Harmonic Rejection Mixer Analysis and Design Based on a Filtered Periodic Impulse Model. IEEE Trans. Circuits Syst. II Express Briefs 68(7): 2292-2296 (2021) - 2020
- [j70]Vijaya Kumar Purushothaman
A Fully Passive RF Front End With 13-dB Gain Exploiting Implicit Capacitive Stacking in a Bottom-Plate N-Path Filter/Mixer. IEEE J. Solid State Circuits 55(5): 1139-1150 (2020) - [j69]Bart J. Thijssen
Low-Power Highly Selective Channel Filtering Using a Transconductor-Capacitor Analog FIR. IEEE J. Solid State Circuits 55(7): 1785-1795 (2020) - [j68]Joep Zanen
Analysis of Switched Capacitor Losses in Polar and Quadrature Switched Capacitor PAs. IEEE Trans. Circuits Syst. II Express Briefs 67-II(10): 1904-1908 (2020) - [c55]Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta
30.4 A 370µW 5.5dB-NF BLE/BT5.0/IEEE 802.15.4-Compliant Receiver with >63dB Adjacent Channel Rejection at >2 Channels Offset in 22nm FDSOI. ISSCC 2020: 466-468 - [c54]Sajad Golabighezelahmad, Eric A. M. Klumperink, Bram Nauta
EVM-based Performance Evaluation of Co-channel Interference Mitigation using Spatial Filtering for Digital MIMO Receivers. VTC Fall 2020: 1-5
2010 – 2019
- 2019
- [j67]Yuanching Lien
High-Linearity Bottom-Plate Mixing Technique With Switch Sharing for N-path Filters/Mixers. IEEE J. Solid State Circuits 54(2): 323-335 (2019) - [j66]Mohammed Abdulaziz
Improving Receiver Close-In Blocker Tolerance by Baseband Gm-C Notch Filtering. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(3): 885-896 (2019) - [j65]Claudia Palattella
Digital-to-Frequency Converters With a DTC: Theoretical Analysis of the Output SFDR. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(10): 3761-3774 (2019) - [c53]Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta
A 0.06-3.4-MHz 92-μW Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers. ESSCIRC 2019: 171-174 - [c52]Rehman Akbar
A Wideband IF Receiver Module for Flexibly Scalable mmWave Beamforming Combining and Interference Cancellation. ESSCIRC 2019: 213-216 - 2018
- [j64]Dongyi Liao
A 2.4-GHz 16-Phase Sub-Sampling Fractional-N PLL With Robust Soft Loop Switching. IEEE J. Solid State Circuits 53(3): 715-727 (2018) - [j63]Yuanching Lien
Enhanced-Selectivity High-Linearity Low-Noise Mixer-First Receiver With Complex Pole Pair Due to Capacitive Positive Feedback. IEEE J. Solid State Circuits 53(5): 1348-1360 (2018) - [j62]Shanthi Pavan
Analysis of the Effect of Source Capacitance and Inductance on $N$ -Path Mixers and Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(5): 1469-1480 (2018) - [j61]Shanthi Pavan
Generalized Analysis of High-Order Switch-RC N-Path Mixers/Filters Using the Adjoint Network. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3267-3278 (2018) - [j60]Bart J. Thijssen
Feedforward Phase Noise Cancellation Exploiting a Sub-Sampling Phase Detector. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1574-1578 (2018) - 2017
- [j59]Michiel C. M. Soer
Beamformer With Constant-Gm Vector Modulators and Its Spatial Intermodulation Distortion. IEEE J. Solid State Circuits 52(3): 735-746 (2017) - [j58]Shanthi Pavan
Simplified Unified Analysis of Switched-RC Passive Mixers, Samplers, and N-Path Filters Using the Adjoint Network. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(10): 2714-2725 (2017) - [c51]Reda Kasri, Eric A. M. Klumperink, Philippe Cathelin, Eric Toumier, Bram Nauta
A digital sine-weighted switched-Gm mixer for single-clock power-scalable parallel receivers. CICC 2017: 1-4 - [c50]Eric A. M. Klumperink, Hugo J. Westerveld, Bram Nauta
N-path filters and mixer-first receivers: A review. CICC 2017: 1-8 - [c49]Dongyi Liao, Fa Foster Dai, Bram Nauta
Multi-phase sub-sampling fractional-N PLL with soft loop switching for fast robust locking. CICC 2017: 1-4 - [c48]Yuanching Lien, Eric A. M. Klumperink, Bernard Tenbroek, Jon Strange, Bram Nauta
24.3 A high-linearity CMOS receiver achieving +44dBm IIP3 and +13dBm B1dB for SAW-less LTE radio. ISSCC 2017: 412-413 - 2016
- [j57]Edgar Sánchez-Sinencio, Jan Mulder, Antonio Liscidini
Introduction to the December Special Issue on the 2016 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits 51(12): 2803-2807 (2016) - [c47]Woogeun Rhee, Eric A. M. Klumperink, Hossein Hashemi:
EE4: Eureka! The best moments of solid-state circuit design in the 2000s. ISSCC 2016: 521 - 2015
- [j56]Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta
Compact Cascadable g m -C All-Pass True Time Delay Cell With Reduced Delay Variation Over Frequency. IEEE J. Solid State Circuits 50(3): 693-703 (2015) - [j55]Jiayoon Zhiyu Ru, Claudia Palattella
A High-Linearity Digital-to-Time Converter Technique: Constant-Slope Charging. IEEE J. Solid State Circuits 50(6): 1412-1423 (2015) - [j54]Harish Kundur Subramaniyan, Eric A. M. Klumperink, Venkatesh Srinivasan, Ali Kiaei, Bram Nauta
RF Transconductor Linearization Robust to Process, Voltage and Temperature Variations. IEEE J. Solid State Circuits 50(11): 2591-2602 (2015) - [j53]Dirk-Jan van den Broek, Eric A. M. Klumperink, Bram Nauta
An In-Band Full-Duplex Radio Receiver With a Passive Vector Modulator Downmixer for Self-Interference Cancellation. IEEE J. Solid State Circuits 50(12): 3003-3014 (2015) - [j52]Lammert Duipmans, Remko E. Struiksma, Eric A. M. Klumperink, Bram Nauta
Analysis of the Signal Transfer and Folding in N-Path Filters With a Series Inductance. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(1): 263-272 (2015) - [j51]Claudia Palattella
A Sensitive Method to Measure the Integral Nonlinearity of a Digital-to-Time Converter Based on Phase Modulation. IEEE Trans. Circuits Syst. II Express Briefs 62-II(8): 741-745 (2015) - [c46]Xiang Gao, Eric A. M. Klumperink, Bram Nauta
Sub-sampling PLL techniques. CICC 2015: 1-8 - [c45]Björn Debaillie, Barend van Liempd, Benjamin P. Hershberg, Jan Craninckx
In-band full-duplex transceiver technology for 5G mobile networks. ESSCIRC 2015: 84-87 - [c44]Dirk-Jan van den Broek, Eric A. M. Klumperink, Bram Nauta
19.2 A self-interference-cancelling receiver for in-band full-duplex wireless with low distortion under cancellation of strong TX leakage. ISSCC 2015: 1-3 - [c43]Eric A. M. Klumperink, Sven Mattisson, Vojkan Vidojkovic:
ES3: How to achieve 1000× more wireless data capacity? 5G? ISSCC 2015: 1 - [c42]Joeri Lechevallier, Remko E. Struiksma, Hani Sherry, Andreia Cathelin, Eric A. M. Klumperink, Bram Nauta
5.5 A forward-body-bias tuned 450MHz Gm-C 3rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply. ISSCC 2015: 1-3 - 2014
- [j50]Eric A. M. Klumperink, Bram Nauta
Software defined radio receivers exploiting noise cancelling: A tutorial review. IEEE Commun. Mag. 52(10): 111-117 (2014) - [j49]Ramen Dutta, Ronan A. R. van der Zee
An Ultra Low Energy FSK Receiver With In-Band Interference Robustness Exploiting a Three-Phase Chirped LO. IEEE J. Emerg. Sel. Topics Circuits Syst. 4(3): 248-261 (2014) - [j48]Paul F. J. Geraedts, Ed J. M. van Tuijl, Eric A. M. Klumperink, Gerard J. M. Wienk, Bram Nauta
Towards minimum achievable phase noise of relaxation oscillators. Int. J. Circuit Theory Appl. 42(3): 238-257 (2014) - [j47]Björn Debaillie, Dirk-Jan van den Broek, Cristina Lavin, Barend van Liempd, Eric A. M. Klumperink, Carmen Palacios, Jan Craninckx
Analog/RF Solutions Enabling Compact Full-Duplex Radios. IEEE J. Sel. Areas Commun. 32(9): 1662-1673 (2014) - [j46]Saqib Subhan
A 100-800 MHz 8-Path Polyphase Transmitter With Mixer Duty-Cycle Control Achieving <-40 dBc for ALL Harmonics. IEEE J. Solid State Circuits 49(3): 595-607 (2014) - [j45]Dlovan H. Mahrof, Eric A. M. Klumperink, Zhiyu Ru, Mark S. Oude Alink
Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity. IEEE J. Solid State Circuits 49(5): 1112-1124 (2014) - [j44]Amir Ghaffari, Eric A. M. Klumperink, Frank E. van Vliet, Bram Nauta
A 4-Element Phased-Array System With Simultaneous Spatial- and Frequency-Domain Filtering at the Antenna Inputs. IEEE J. Solid State Circuits 49(6): 1303-1316 (2014) - [j43]P. V. Ananda Mohan, Eric A. M. Klumperink, Dlovan H. Mahrof, Bram Nauta
Comments on "Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity". IEEE J. Solid State Circuits 49(9): 2083 (2014) - [c41]Harish Kundur Subramaniyan, Eric A. M. Klumperink, Bram Nauta
RF transconductor linearization technique robust to process, voltage and temperature variations. A-SSCC 2014: 333-336 - [c40]Barend van Liempd, Björn Debaillie, Jan Craninckx
RF self-interference cancellation for full-duplex. CrownCom 2014: 526-531 - [c39]Remko E. Struiksma, Eric A. M. Klumperink, Bram Nauta
A 500MHz- 2.7 GHz 8-path weaver downconverter with harmonic rejection and embedded filtering. ESSCIRC 2014: 223-226 - [c38]Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta
3.5 A 1.0-to-2.5GHz beamforming receiver with constant-Gm vector modulator consuming. ISSCC 2014: 66-67 - 2013
- [j42]Mark S. Oude Alink
Spectrum Sensing With High Sensitivity and Interferer Robustness Using Cross-Correlation Energy Detection. IEEE J. Emerg. Sel. Topics Circuits Syst. 3(4): 566-575 (2013) - [j41]Amir Ghaffari, Eric A. M. Klumperink, Bram Nauta
Tunable N-Path Notch Filters for Blocker Suppression: Modeling and Verification. IEEE J. Solid State Circuits 48(6): 1370-1382 (2013) - [j40]Ramen Dutta, Eric A. M. Klumperink, Xiang Gao, Zhiyu Ru, Ronan A. R. van der Zee
Flip-Flops for Accurate Multiphase Clocking: Transmission Gate Versus Current Mode Logic. IEEE Trans. Circuits Syst. II Express Briefs 60-II(7): 422-426 (2013) - [j39]Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta
Frequency Limitations of First-Order gm - RC All-Pass Delay Circuits. IEEE Trans. Circuits Syst. II Express Briefs 60-II(9): 572-576 (2013) - [c37]Amir Ghaffari, Eric A. M. Klumperink, Frank E. van Vliet, Bram Nauta
Simultaneous spatial and frequency-domain filtering at the antenna inputs achieving up to +10dBm out-of-band/beam P1dB. ISSCC 2013: 84-85 - [c36]Albert C. Jerng, Yorgos Palaskas, Eric A. M. Klumperink, Didier Belot, Songcheol Hong, Brian A. Floyd:
F1: Advanced RF transceiver design techniques. ISSCC 2013: 500-501 - 2012
- [j38]Milad Darvishi, Ronan A. R. van der Zee
Widely Tunable 4th Order Switched Gm-C Band-Pass Filter Based on N-Path Filters. IEEE J. Solid State Circuits 47(12): 3105-3119 (2012) - [j37]Mark S. Oude Alink
A CMOS-Compatible Spectrum Analyzer for Cognitive Radio Exploiting Crosscorrelation to Improve Linearity and Noise Performance. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(3): 479-492 (2012) - [c35]Mark S. Oude Alink
Improving harmonic rejection for spectrum sensing using crosscorrelation. ESSCIRC 2012: 361-364 - [c34]Amir Ghaffari, Eric A. M. Klumperink, Bram Nauta
8-Path tunable RF notch filters for blocker suppression. ISSCC 2012: 76-78 - [c33]Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta
A 1-to-2.5GHz phased-array IC based on gm-RC all-pass time-delay cells. ISSCC 2012: 80-82 - [c32]Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta
A 1.5-to-5.0GHz input-matched +2dBm P1dB all-passive switched-capacitor beamforming receiver front-end in 65nm CMOS. ISSCC 2012: 174-176 - [c31]Milad Darvishi, Ronan A. R. van der Zee
A 0.3-to-1.2GHz tunable 4th-order switched gm-C bandpass filter with >55dB ultimate rejection and out-of-band IIP3 of +29dBm. ISSCC 2012: 358-360 - [c30]Eric A. M. Klumperink, Domine Leenaerts, Gabriel M. Rebeiz:
Beamforming techniques and RF transceiver design. ISSCC 2012: 498-499 - 2011
- [j36]Amir Ghaffari, Eric A. M. Klumperink, Michiel C. M. Soer, Bram Nauta
Tunable High-Q N-Path Band-Pass Filters: Modeling and Verification. IEEE J. Solid State Circuits 46(5): 998-1010 (2011) - [j35]Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta
Spatial Interferer Rejection in a Four-Element Beamforming Receiver Front-End With a Switched-Capacitor Vector Modulator. IEEE J. Solid State Circuits 46(12): 2933-2942 (2011) - [j34]Mark S. Oude Alink
Lowering the SNR Wall for Energy Detection Using Cross-Correlation. IEEE Trans. Veh. Technol. 60(8): 3748-3757 (2011) - [c29]Eric A. M. Klumperink, Ramen Dutta, Zhiyu Ru, Bram Nauta
Jitter-Power minimization of digital frequency synthesis architectures. ISCAS 2011: 165-168 - [c28]Saqib Subhan
Towards suppression of all harmonics in a polyphase multipath transmitter. ISCAS 2011: 2185-2188 - [c27]Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta
A 1.0-to-4.0GHz 65nm CMOS four-element beamforming receiver using a switched-capacitor vector modulator with approximate sine weighting via charge redistribution. ISSCC 2011: 64-66 - [c26]Mark S. Oude Alink
Exploring the Use of Two Antennas for Crosscorrelation Spectrum Sensing. VTC Fall 2011: 1-5 - 2010
- [j33]Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
Power Efficient Gigabit Communication Over Capacitively Driven RC-Limited On-Chip Interconnects. IEEE J. Solid State Circuits 45(2): 447-457 (2010) - [j32]Zhiyu Ru, Eric A. M. Klumperink, Carlos E. Saavedra
A 300-800 MHz Tunable Filter and Linearized LNA Applied in a Low-Noise Harmonic-Rejection RF-Sampling Receiver. IEEE J. Solid State Circuits 45(5): 967-978 (2010) - [j31]Michiel van Elzakker, Ed van Tuijl, Paul F. J. Geraedts, Daniël Schinkel, Eric A. M. Klumperink, Bram Nauta
A 10-bit Charge-Redistribution ADC Consuming 1.9 μ W at 1 MS/s. IEEE J. Solid State Circuits 45(5): 1007-1015 (2010) - [j30]Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta
Discrete-Time Mixing Receiver Architecture for RF-Sampling Software-Defined Radio. IEEE J. Solid State Circuits 45(9): 1732-1745 (2010) - [j29]Xiang Gao, Eric A. M. Klumperink, Gerard Socci, Mounir Bohsali, Bram Nauta
Spur Reduction Techniques for Phase-Locked Loops Exploiting A Sub-Sampling Phase Detector. IEEE J. Solid State Circuits 45(9): 1809-1821 (2010) - [j28]Michiel C. M. Soer, Eric A. M. Klumperink, Pieter-Tjerk de Boer, Frank E. van Vliet, Bram Nauta
Unified Frequency-Domain Analysis of Switched-Series- RC Passive Mixers and Samplers. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(10): 2618-2631 (2010) - [c25]Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta
Time delay circuits: A quality criterion for delay variations versus frequency. ISCAS 2010: 4281-4284 - [c24]Xiang Gao, Eric A. M. Klumperink, Gerard Socci, Mounir Bohsali, Bram Nauta
Spur-reduction techniques for PLLs using sub-sampling phase detection. ISSCC 2010: 474-475 - [c23]Ramen Dutta, Tarun Kanti Bhattacharyya
Optimized Stage Ratio of Tapered CMOS Inverters for Minimum Power and Mismatch Jitter Product. VLSI Design 2010: 152-157
2000 – 2009
- 2009
- [j27]Xiang Gao, Eric A. M. Klumperink, Mounir Bohsali, Bram Nauta
A Low Noise Sub-Sampling PLL in Which Divider Noise is Eliminated and PD/CP Noise is Not Multiplied by N2. IEEE J. Solid State Circuits 44(12): 3253-3263 (2009) - [j26]Zhiyu Ru, Niels A. Moseley, Eric A. M. Klumperink, Bram Nauta
Digitally Enhanced Software-Defined Radio Receiver Robust to Out-of-Band Interference. IEEE J. Solid State Circuits 44(12): 3359-3375 (2009) - [j25]Xiang Gao, Eric A. M. Klumperink, Paul F. J. Geraedts, Bram Nauta
Jitter Analysis and a Benchmarking Figure-of-Merit for Phase-Locked Loops. IEEE Trans. Circuits Syst. II Express Briefs 56-II(2): 117-121 (2009) - [j24]Mark S. Oude Alink
Spurious-Free Dynamic Range of a Uniform Quantizer. IEEE Trans. Circuits Syst. II Express Briefs 56-II(6): 434-438 (2009) - [j23]Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
Low-Power, High-Speed Transceivers for Network-on-Chip Communication. IEEE Trans. Very Large Scale Integr. Syst. 17(1): 12-21 (2009) - [c22]Michiel C. M. Soer, Eric A. M. Klumperink, Zhiyu Ru, Frank E. van Vliet, Bram Nauta
A 0.2-to-2.0GHz 65nm CMOS receiver without LNA achieving ≫11dBm IIP3 and ≪6.5 dB NF. ISSCC 2009: 222-223 - [c21]Zhiyu Ru, Eric A. M. Klumperink, Gerard Wienk, Bram Nauta
A software-defined radio receiver architecture robust to out-of-band interference. ISSCC 2009: 230-231 - [c20]Niels A. Moseley, Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta
A 400-to-900 MHz receiver with dual-domain harmonic rejection exploiting adaptive interference cancellation. ISSCC 2009: 232-233 - [c19]Xiang Gao, Eric A. M. Klumperink, Mounir Bohsali, Bram Nauta
A 2.2GHz 7.6mW sub-sampling PLL with -126dBc/Hz in-band phase noise and 0.15psrms jitter in 0.18µm CMOS. ISSCC 2009: 392-393 - 2008
- [j22]Stephan C. Blaakmeer, Eric A. M. Klumperink, Domine M. W. Leenaerts, Bram Nauta
Wideband Balun-LNA With Simultaneous Output Balancing, Noise-Canceling and Distortion-Canceling. IEEE J. Solid State Circuits 43(6): 1341-1350 (2008) - [j21]Stephan C. Blaakmeer, Eric A. M. Klumperink, Domine M. W. Leenaerts, Bram Nauta
The Blixer, a Wideband Balun-LNA-I/Q-Mixer Topology. IEEE J. Solid State Circuits 43(12): 2706-2715 (2008) - [j20]Xiang Gao, Bram Nauta
Advantages of Shift Registers Over DLLs for Flexible Low Jitter Multiphase Clock Generation. IEEE Trans. Circuits Syst. II Express Briefs 55-II(3): 244-248 (2008) - [j19]Niels A. Moseley, Eric A. M. Klumperink, Bram Nauta
A Two-Stage Approach to Harmonic Rejection Mixing Using Blind Interference Cancellation. IEEE Trans. Circuits Syst. II Express Briefs 55-II(10): 966-970 (2008) - [j18]Amorn Jiraseree-amornkun
Theoretical Analysis of Highly Linear Tunable Filters Using Switched-Resistor Techniques. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(11): 3641-3654 (2008) - [c18]Michiel van Elzakker, Ed van Tuijl, Paul F. J. Geraedts, Daniël Schinkel, Eric A. M. Klumperink, Bram Nauta
A 1.9μW 4.4fJ/Conversion-step 10b 1MS/s Charge-Redistribution ADC. ISSCC 2008: 244-245 - [c17]Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta
A Discrete-Time Mixing Receiver Architecture with Wideband Harmonic Rejection. ISSCC 2008: 322-323 - [c16]Stephan C. Blaakmeer, Eric A. M. Klumperink, Domine Leenaerts, Bram Nauta
A Wideband Balun LNA I/Q-Mixer combination in 65nm CMOS. ISSCC 2008: 326-327 - [c15]Paul F. J. Geraedts, Ed van Tuijl, Eric A. M. Klumperink, Gerard Wienk, Bram Nauta
A 90μW 12MHz Relaxation Oscillator with a -162dB FOM. ISSCC 2008: 348-349 - 2007
- [j17]Eric A. M. Klumperink, Rameswor Shrestha, Eisse Mensink, Vincent J. Arkesteijn, Bram Nauta
Cognitive radios for dynamic spectrum access - polyphase multipath radio circuits for dynamic spectrum access. IEEE Commun. Mag. 45(5): 104-112 (2007) - [j16]Arnoud P. van der Wel, Eric A. M. Klumperink, Jay S. Kolhatkar, Eric Hoekstra, Martijn F. Snoeij, Cora Salm
Low-Frequency Noise Phenomena in Switched MOSFETs. IEEE J. Solid State Circuits 42(3): 540-550 (2007) - [j15]Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
Optimal Positions of Twists in Global On-Chip Differential Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 15(4): 438-446 (2007) - [c14]Stephan C. Blaakmeer, Eric A. M. Klumperink, Bram Nauta
An inductorless wideband balun-LNA in 65nm CMOS with balanced output. ESSCIRC 2007: 364-367 - [c13]Eric A. M. Klumperink, Rameswor Shrestha, Eisse Mensink, Gerard Wienk, Zhiyu Ru, Bram Nauta:
Multipath Polyphase Circuits and their Application to RF Transceivers. ISCAS 2007: 273-276 - [c12]Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta:
On the Suitability of Discrete-Time Receivers for Software-Defined Radio. ISCAS 2007: 2522-2525 - [c11]Xiang Gao, Eric A. M. Klumperink, Bram Nauta:
Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers. ISCAS 2007: 2854-2857 - [c10]Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time. ISSCC 2007: 314-605 - [c9]Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
A 0.28pJ/b 2Gb/s/ch Transceiver in 90nm CMOS for 10mm On-Chip interconnects. ISSCC 2007: 414-612 - 2006
- [j14]Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, Ed J. M. van Tuijl, Bram Nauta
A 3-Gb/s/ch transceiver for 10-mm uninterrupted RC-limited global on-chip interconnects. IEEE J. Solid State Circuits 41(1): 297-306 (2006) - [j13]Jan H. Rutger Schrader, Eric A. M. Klumperink, Jan L. Visschers, Bram Nauta:
Pulse-width modulation pre-emphasis applied in a wireline transmitter, achieving 33 dB loss compensation at 5-Gb/s in 0.13-μm CMOS. IEEE J. Solid State Circuits 41(4): 990-999 (2006) - [j12]Rameswor Shrestha, Eric A. M. Klumperink, Eisse Mensink, Gerard J. M. Wienk, Bram Nauta
A Polyphase Multipath Technique for Software-Defined Radio Transmitters. IEEE J. Solid State Circuits 41(12): 2681-2692 (2006) - [j11]Vincent J. Arkesteijn, Eric A. M. Klumperink, Bram Nauta
Jitter requirements of the sampling clock in software radio receivers. IEEE Trans. Circuits Syst. II Express Briefs 53-II(2): 90-94 (2006) - [c8]Jan H. Rutger Schrader, Eric A. M. Klumperink, Jan L. Visschers, Bram Nauta
Wireline Equalization using Pulse-Width Modulation. CICC 2006: 591-598 - [c7]Amorn Jiraseree-amornkun, Apisak Worapishet, Eric A. M. Klumperink, Bram Nauta, Wanlop Surakampontorn:
Slew rate induced distortion in switched-resistor integrators. ISCAS 2006 - [c6]Rameswor Shrestha, Eisse Mensink, Eric A. M. Klumperink, Gerard J. M. Wienk, Bram Nauta:
A multipath technique for canceling harmonics and sidebands in a wideband power upconverter. ISSCC 2006: 1800-1809 - 2005
- [j10]Eisse Mensink, Eric A. M. Klumperink, Bram Nauta
Distortion cancellation by polyphase multipath circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(9): 1785-1794 (2005) - [c5]Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta
Optimally-placed twists in global on-chip differential interconnects. ESSCIRC 2005: 475-478 - [c4]Jan H. Rutger Schrader, Eric A. M. Klumperink, Jan L. Visschers, Bram Nauta
Jitter limitations on multi-carrier modulation. ISCAS (6) 2005: 6090-6093 - 2004
- [j9]Federico Bruccoleri, Eric A. M. Klumperink, Bram Nauta
Wide-band CMOS low-noise amplifier exploiting thermal noise canceling. IEEE J. Solid State Circuits 39(2): 275-282 (2004) - [j8]Eric A. M. Klumperink, Simon M. Louwsma, Gerard J. M. Wienk, Bram Nauta
A CMOS switched transconductor mixer. IEEE J. Solid State Circuits 39(8): 1231-1240 (2004) - [j7]Remco C. H. van de Beek, Cicero S. Vaucher, Domine M. W. Leenaerts, Eric A. M. Klumperink, Bram Nauta
A 2.5-10-GHz clock multiplier unit with 0.22-ps RMS jitter in standard 0.18-μm CMOS. IEEE J. Solid State Circuits 39(11): 1862-1872 (2004) - [c3]Vincent J. Arkesteijn, Eric A. M. Klumperink, Bram Nauta:
A wideband high-linearity RF receiver front-end in CMOS. ESSCIRC 2004: 71-74 - [c2]Eisse Mensink, Eric A. M. Klumperink, Bram Nauta:
Distortion cancellation via polyphase multipath circuits. ISCAS (1) 2004: 1098-1101 - 2003
- [j6]Eric A. M. Klumperink, Bram Nauta
Systematic comparison of HF CMOS transconductors. IEEE Trans. Circuits Syst. II Express Briefs 50(10): 728-741 (2003) - 2001
- [j5]Federico Bruccoleri, Eric A. M. Klumperink, Bram Nauta
Generating all two-MOS-transistor amplifiers leads to new wide-band LNAs. IEEE J. Solid State Circuits 36(7): 1032-1040 (2001) - [c1]Eric A. M. Klumperink, Federico Bruccoleri, Bram Nauta:
Finding all elementary circuits exploiting transconductance. ISCAS (1) 2001: 667-670 - 2000
- [j4]Eric A. M. Klumperink, Sander L. J. Gierkink, Arnoud P. van der Wel, Bram Nauta
Reducing MOSFET 1/f noise and power consumption by switched biasing. IEEE J. Solid State Circuits 35(7): 994-1001 (2000)
1990 – 1999
- 1999
- [j3]Sander L. J. Gierkink, Eric A. M. Klumperink, Arnoud P. van der Wel, Gian Hoogzaad, Ed A. J. M. van Tuijl, Bram Nauta
Intrinsic 1/f device noise reduction and its effect on phase noise in CMOS ring oscillators. IEEE J. Solid State Circuits 34(7): 1022-1025 (1999) - 1996
- [j2]Eric A. M. Klumperink, Carlo T. Klein, Bas Rüggeberg, Ed J. M. van Tuijl:
AM suppression with low AM-PM conversion with the aid of a variable-gain amplifier. IEEE J. Solid State Circuits 31(5): 625-633 (1996)
1980 – 1989
- 1989
- [j1]Eric A. M. Klumperink, Evert Seevinck:
MOS current gain cells with electronically variable gain and constant bandwidth. IEEE J. Solid State Circuits 24(5): 1465-1467 (1989)
Coauthor Index
[j78] [j77] [j75] [j74] [j73] [j72] [j70] [j69] [j68] [c55] [c54] [j67] [j66] [j65] [c53] [j64] [j63] [j60] [j59] [c51] [c50] [c49] [c48] [j56] [j55] [j54] [j53] [j52] [j51] [c46] [c45] [c44] [c42] [j50] [j49] [j48] [j47] [j46] [j45] [j44] [j43] [c41] [c39] [c38] [j42] [j41] [j40] [j39] [c37] [j38] [j37] [c35] [c34] [c33] [c32] [c31] [j36] [j35] [j34] [c29] [c28] [c27] [c26] [j33] [j32] [j31] [j30] [j29] [j28] [c25] [c24] [j27] [j26] [j25] [j24] [j23] [c22] [c21] [c20] [c19] [j22] [j21] [j20] [j19] [j18] [c18] [c17] [c16] [c15] [j17] [j16] [j15] [c14] [c13] [c12] [c11] [c10] [c9] [j14] [j13] [j12] [j11] [c8] [c7] [c6] [j10] [c5] [c4] [j9] [j8] [j7] [c3] [c2] [j6] [j5] [c1] [j4] [j3]
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