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Jianhua Li 0003
Person information
- affiliation (PhD 2013): Hefei University of Technology, School of Computer Science and Information, China
- affiliation (former): City University of Hong Kong, Department of Computer Science, Hong Kong
- affiliation (former): Anqing Normal University, Department of Computer Science and Technology, Anhui, China
Other persons with the same name
- Jianhua Li (aka: Jian-Hua Li, Jian-hua Li, Jian Hua Li) — disambiguation page
- Jianhua Li 0001
(aka: Jian-hua Li 0001) — Shanghai Jiao Tong University, Shanghai Key Laboratory of Integrated Administration Technologies for Information Security, China
- Jianhua Li 0002
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2020 – today
- 2024
- [j21]Yiming Ouyang, Yihe Zhang
A tree-recursive partitioned multicast mechanism for NoC-based deep neural network accelerator. Microelectron. J. 147: 106161 (2024) - [j20]Yiming Ouyang, Tianbao Zhang
Fault-tolerant routing for reliable packet transmission in on-chip networks. Microelectron. J. 153: 106425 (2024) - 2023
- [j19]Wu Zhou
A transparent virtual channel power gating method for on-chip network routers. Integr. 88: 286-297 (2023) - [j18]Yiming Ouyang, Chenglong Sun
Transit ring: bubble flow control for eliminating inter-ring communication congestion. J. Supercomput. 79(2): 1161-1181 (2023) - 2022
- [j17]Yu Gu
WiGRUNT: WiFi-Enabled Gesture Recognition Using Dual-Attention Network. IEEE Trans. Hum. Mach. Syst. 52(4): 736-746 (2022) - 2020
- [j16]Yiming Ouyang
A Novel Low-Latency Regional Fault-Aware Fault-Tolerant Routing Algorithm for Wireless NoC. IEEE Access 8: 22650-22663 (2020)
2010 – 2019
- 2019
- [j15]Fanfan Shen, Yanxiang He, Jun Zhang, Qingan Li, Jianhua Li
Reuse locality aware cache partitioning for last-level cache. Comput. Electr. Eng. 74: 319-330 (2019) - [j14]Yiming Ouyang, Zhe Li, Jianhua Li
CPCA: An efficient wireless routing algorithm in WiNoC for cross path congestion awareness. Integr. 69: 75-84 (2019) - [j13]Yiming Ouyang
Design of Wireless Network on Chip with Priority-Based MAC. J. Circuits Syst. Comput. 28(8): 1950124:1-1950124:18 (2019) - 2018
- [j12]Yiming Ouyang, Zhe Li, Kun Xing, Zhengfeng Huang, Huaguo Liang, Jianhua Li:
Design of Low-Power WiNoC with Congestion-Aware Wireless Node. J. Circuits Syst. Comput. 27(9): 1850148:1-1850148:18 (2018) - [c11]Hu Wan
NVLH: Crash-Consistent Linear Hashing for Non-Volatile Memory. NVMSA 2018: 117-118 - 2017
- [j11]Jianhua Li, Minming Li
Thread Criticality Assisted Replication and Migration for Chip Multiprocessor Caches. IEEE Trans. Computers 66(10): 1747-1762 (2017) - 2015
- [j10]Qing'an Li, Yanxiang He, Jianhua Li, Liang Shi, Yiran Chen, Chun Jason Xue:
Compiler-Assisted Refresh Minimization for Volatile STT-RAM Cache. IEEE Trans. Computers 64(8): 2169-2181 (2015) - 2014
- [j9]Jianhua Li, Liang Shi, Chun Jason Xue
Dual partitioning multicasting for high-performance on-chip networks. J. Parallel Distributed Comput. 74(1): 1858-1871 (2014) - [j8]Jianhua Li, Liang Shi, Qing'an Li, Chun Jason Xue
Thread Progress Aware Coherence Adaption for Hybrid Cache Coherence Protocols. IEEE Trans. Parallel Distributed Syst. 25(10): 2697-2707 (2014) - [j7]Yazhi Huang, Liang Shi, Jianhua Li, Qing'an Li
WCET-Aware Re-Scheduling Register Allocation for Real-Time Embedded Systems With Clustered VLIW Architecture. IEEE Trans. Very Large Scale Integr. Syst. 22(1): 168-180 (2014) - [j6]Qing'an Li
Compiler-Assisted STT-RAM-Based Hybrid Cache for Energy Efficient Embedded Systems. IEEE Trans. Very Large Scale Integr. Syst. 22(8): 1829-1840 (2014) - [j5]Liang Shi, Jianhua Li, Qing'an Li
A Unified Write Buffer Cache Management Scheme for Flash Memory. IEEE Trans. Very Large Scale Integr. Syst. 22(12): 2779-2792 (2014) - 2013
- [j4]Jianhua Li, Liang Shi, Qing'an Li
Low-energy volatile STT-RAM cache design using cache-coherence-enabled adaptive refresh. ACM Trans. Design Autom. Electr. Syst. 19(1): 5:1-5:23 (2013) - [j3]Liang Shi, Jianhua Li, Chun Jason Xue
Cooperating Virtual Memory and Write Buffer Management for Flash-Based Storage Systems. IEEE Trans. Very Large Scale Integr. Syst. 21(4): 706-719 (2013) - [j2]Wanyong Tian, Yingchao Zhao
Task Allocation on Nonvolatile-Memory-Based Hybrid Main Memory. IEEE Trans. Very Large Scale Integr. Syst. 21(7): 1271-1284 (2013) - [c10]Qing'an Li
Compiler-assisted refresh minimization for volatile STT-RAM cache. ASP-DAC 2013: 273-278 - [c9]Jianhua Li, Liang Shi, Qing'an Li, Chun Jason Xue, Yiran Chen, Yinlong Xu:
Cache coherence enabled adaptive refresh for volatile STT-RAM. DATE 2013: 1247-1250 - 2012
- [j1]Liang Shi, Jianhua Li, Chun Jason Xue
Hybrid nonvolatile disk cache for energy-efficient and high-performance systems. ACM Trans. Design Autom. Electr. Syst. 18(1): 8:1-8:23 (2012) - [c8]Jianhua Li, Liang Shi, Qing'an Li
TEACA: Thread ProgrEss Aware Coherence Adaption for hybrid coherence protocols. ESTIMedia 2012: 19-26 - [c7]Qing'an Li
MAC: migration-aware compilation for STT-RAM based hybrid cache in embedded systems. ISLPED 2012: 351-356 - [c6]Qing'an Li
Code Motion for Migration Minimization in STT-RAM Based Hybrid Cache. ISVLSI 2012: 410-415 - 2011
- [c5]Liang Shi, Jianhua Li, Chun Jason Xue
ExLRU: a unified write buffer cache management for flash memory. EMSOFT 2011: 339-348 - [c4]Jianhua Li, Liang Shi, Chun Jason Xue
Exploiting set-level write non-uniformity for energy-efficient NVM-based hybrid cache. ESTIMedia 2011: 19-28 - [c3]Wanyong Tian, Jianhua Li, Yingchao Zhao
Optimal task allocation on non-volatile memory based hybrid main memory. RACS 2011: 1-6 - [c2]Jianhua Li, Chun Jason Xue
STT-RAM based energy-efficiency hybrid cache for CMPs. VLSI-SoC 2011: 31-36 - 2010
- [c1]Jianhua Li, Chun Jason Xue
LADPM: Latency-Aware Dual-Partition Multicast Routing for Mesh-Based Network-on-Chips. ICPADS 2010: 423-430
Coauthor Index
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