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João Vieira
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2020 – today
- 2024
- [j4]João Vieira
, Nuno Roma
NDPmulator: Enabling Full-System Simulation for Near-Data Accelerators From Caches to DRAM. IEEE Access 12: 10349-10365 (2024) - [j3]João Vieira
gem5-accel: A Pre-RTL Simulation Toolchain for Accelerator Architecture Validation. IEEE Comput. Archit. Lett. 23(1): 1-4 (2024) - 2023
- [c11]Júlio Castro Lopes
Automatic Annotation of Heart Rate Sequences. SeGAH 2023: 1-6 - [c10]Júlio Castro Lopes
An Architecture for Capturing and Synchronizing Heart Rate and Body Motion for Stress Inference. SeGAH 2023: 1-7 - 2022
- [c9]João Vieira, Nuno Roma
gem5-ndp: Near-Data Processing Architecture Simulation From Low Level Caches to DRAM. SBAC-PAD 2022: 41-50 - 2021
- [j2]João Vieira
A Compute Cache System for Signal Processing Applications. J. Signal Process. Syst. 93(10): 1173-1186 (2021) - 2020
- [c8]João Vieira, Nuno Roma
Processing Convolutional Neural Networks on Cache. ICASSP 2020: 1658-1662
2010 – 2019
- 2019
- [j1]João Vieira
kNN-STUFF: kNN STreaming Unit for Fpgas. IEEE Access 7: 170864-170877 (2019) - [c7]João Vieira, Edouard Giacomin
A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories. VLSI-SoC 2019: 160-165 - [c6]João Vieira, Edouard Giacomin, Yasir Mahmood Qureshi, Marina Zapater, Xifan Tang, Shahar Kvatinsky, David Atienza, Pierre-Emmanuel Gaillardon:
Accelerating Inference on Binary Neural Networks with Digital RRAM Processing. VLSI-SoC (Selected Papers) 2019: 257-278 - 2018
- [c5]João Vieira, Nuno Roma
Exploiting Compute Caches for Memory Bound Vector Operations. SBAC-PAD 2018: 197-200 - 2016
- [c4]Maurício Sousa
SleeveAR: Augmented Reality for Rehabilitation using Realtime Feedback. IUI 2016: 175-185 - 2014
- [c3]João Vieira, Cláudia Antunes
Decision Tree Learner in the Presence of Domain Knowledge. CSWS 2014: 42-55
1990 – 1999
- 1998
- [c2]José C. Cunha, João Lourenço, João Vieira, Bruno Moscão, Daniel Pereira:
A Framework to support Parallel and Distrubuted Debugging. HPCN Europe 1998: 708-717 - [c1]José C. Cunha, Pedro D. Medeiros
The DOTPAR Project: Towards a Framework Supporting Domain Oriented Tools for Parallel and Distributed Processing. HPCN Europe 1998: 952-954
Coauthor Index
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last updated on 2024-10-07 22:15 CEST by the dblp team
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