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Filipp Akopyan
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2020 – today
- 2024
- [c12]Andrew S. Cassidy, John V. Arthur, Filipp Akopyan, Alexander Andreopoulos, Rathinakumar Appuswamy, Pallab Datta, Michael V. DeBole, Steven K. Esser, Carlos Ortega Otero, Jun Sawada, Brian Taba, Arnon Amir, Deepika Bablani, Peter J. Carlson, Myron D. Flickner, Rajamohan Gandhasri, Guillaume Garreau, Megumi Ito
, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Jeffrey L. McKinstry, Yutaka Y. Nakamura, Tapan K. Nayak, William P. Risk, Kai Schleupen, Ben Shaw, Jay Sivagnaname, Daniel F. Smith, Ignacio Terrizzano, Takanori Ueda, Dharmendra S. Modha:
11.4 IBM NorthPole: An Architecture for Neural Network Inference with a 12nm Chip. ISSCC 2024: 214-215 - 2023
- [c11]Dharmendra S. Modha, Filipp Akopyan, Alexander Andreopoulos, Rathinakumar Appuswamy, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Michael V. DeBole, Steven K. Esser, Carlos Ortega Otero, Jun Sawada, Brian Taba, Arnon Amir, Deepika Bablani, Peter J. Carlson, Myron D. Flickner, Rajamohan Gandhasri, Guillaume Garreau, Megumi Ito
IBM NorthPole Neural Inference Machine. HCS 2023: 1-58
2010 – 2019
- 2019
- [j2]Michael V. DeBole
TrueNorth: Accelerating From Zero to 64 Million Neurons in 10 Years. Computer 52(5): 20-29 (2019) - 2016
- [c10]Filipp Akopyan:
Design and Tool Flow of IBM's TrueNorth: an Ultra-Low Power Programmable Neurosynaptic Chip with 1 Million Neurons. ISPD 2016: 59-60 - [c9]Jun Sawada, Filipp Akopyan, Andrew S. Cassidy, Brian Taba, Michael V. DeBole, Pallab Datta, Rodrigo Alvarez-Icaza, Arnon Amir
Truenorth ecosystem for brain-inspired computing: scalable systems, software, and applications. SC 2016: 130-141 - 2015
- [j1]Filipp Akopyan, Jun Sawada, Andrew Cassidy, Rodrigo Alvarez-Icaza, John V. Arthur, Paul Merolla, Nabil Imam, Yutaka Y. Nakamura, Pallab Datta, Gi-Joon Nam, Brian Taba, Michael P. Beakes, Bernard Brezzo, Jente B. Kuang, Rajit Manohar, William P. Risk, Bryan L. Jackson, Dharmendra S. Modha:
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(10): 1537-1557 (2015) - 2014
- [c8]Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, Jun Sawada, John V. Arthur, Paul Merolla, Pallab Datta, Marc González Tallada, Brian Taba, Alexander Andreopoulos, Arnon Amir
Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100× Speedup in Time-to-Solution and ~100, 000× Reduction in Energy-to-Solution. SC 2014: 27-38 - 2013
- [c7]Andrew S. Cassidy, Paul Merolla, John V. Arthur, Steven K. Esser, Bryan L. Jackson, Rodrigo Alvarez-Icaza, Pallab Datta, Jun Sawada, Theodore M. Wong, Vitaly Feldman, Arnon Amir
Cognitive computing building block: A versatile and efficient digital neuron model for neurosynaptic cores. IJCNN 2013: 1-10 - 2012
- [c6]Nabil Imam, Filipp Akopyan, John V. Arthur, Paul Merolla, Rajit Manohar, Dharmendra S. Modha:
A Digital Neurosynaptic Core Using Event-Driven QDI Circuits. ASYNC 2012: 25-32 - [c5]John V. Arthur, Paul Merolla, Filipp Akopyan, Rodrigo Alvarez-Icaza, Andrew Cassidy, Shyamal Chandra, Steven K. Esser, Nabil Imam, William P. Risk, Daniel Ben Dayan Rubin
Building block of a programmable neuromorphic substrate: A digital neurosynaptic core. IJCNN 2012: 1-8 - 2011
- [c4]Paul Merolla, John V. Arthur, Filipp Akopyan, Nabil Imam, Rajit Manohar, Dharmendra S. Modha:
A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm. CICC 2011: 1-4
2000 – 2009
- 2008
- [c3]Filipp Akopyan, Carlos Tadeo Ortega Otero, David Fang, Sandra J. Jackson, Rajit Manohar:
Variability in 3-D integrated circuits. CICC 2008: 659-662 - 2006
- [c2]Filipp Akopyan, Rajit Manohar, Alyssa B. Apsel:
A Level-Crossing Flash Asynchronous Analog-to-Digital Converter. ASYNC 2006: 12-22 - [c1]David Fang, Filipp Akopyan, Rajit Manohar:
Self-Timed Thermally-Aware Circuits. ISVLSI 2006: 438-439
Coauthor Index
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last updated on 2024-10-07 22:13 CEST by the dblp team
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