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Seungjong Lee
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2020 – today
- 2024
- [j7]Hsiang-Wen Chen
, Seungjong Lee
An Anti-Aliasing-Filter-Assisted 3rd-Order VCO-Based CTDSM With NS-SAR Quantizer. IEEE J. Solid State Circuits 59(4): 1171-1183 (2024) - [j6]Taewook Kang
A Multimode 157 μW 4-Channel 80 dBA-SNDR Speech Recognition Frontend With Direction-of-Arrival Correction Adaptive Beamformer. IEEE J. Solid State Circuits 59(6): 1794-1808 (2024) - 2023
- [j5]Seungjong Lee
An 81.6 dB SNDR 15.625 MHz BW Third-Order CT SDM With a True Time-Interleaving Noise-Shaping Quantizer. IEEE J. Solid State Circuits 58(4): 929-938 (2023) - [c14]Hsiang-Wen Chen
A 0.024mm² 84.2dB-SNDR 1MHz-BW 3rd-Order VCO-Based CTDSM with NS-SAR Quantizer (NSQ VCO CTDSM). VLSI Technology and Circuits 2023: 1-2 - [c13]Seungheun Song, Taewook Kang, Seungjong Lee, Michael P. Flynn:
A 150-MS/s Fully Dynamic SAR-Assisted Pipeline ADC Using a Floating Ring Amplifier and Gain-Enhancing Miller Negative-C. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j4]Seungjong Lee
An Eight-Element Frequency-Selective Acoustic Beamformer and Bitstream Feature Extractor. IEEE J. Solid State Circuits 57(6): 1812-1823 (2022) - [c12]Evelyn Ware, Justin M. Correll
6GS/s 8-channel CIC SAR TI-ADC with Neural Network Calibration. ESSCIRC 2022: 325-328 - [c11]Taewook Kang, Seungjong Lee, Seungheun Song
A Multimode 157μW 4-Channel 80dBA-SNDR Speech-Recognition Frontend With Self-DOA Correction Adaptive Beamformer. ISSCC 2022: 500-502 - [c10]Seungjong Lee, Taewook Kang, Seungheun Song
An 81.6dB SNDR 15.625MHz BW 3rd Order CT SDM with a True TI NS Quantizer. VLSI Technology and Circuits 2022: 54-55 - [c9]Justin M. Correll
An 8-bit 20.7 TOPS/W Multi-Level Cell ReRAM-based Compute Engine. VLSI Technology and Circuits 2022: 264-265 - 2021
- [c8]Taewook Kang, Seungjong Lee, Mohammad Haghigat, Darren Abramson, Michael P. Flynn:
A 50μW 4-channel 83dBA-SNDR Speech Recognition Front-End with Adaptive Beamforming and Feature Extraction. CICC 2021: 1-2 - 2020
- [c7]Seungjong Lee, Taewook Kang, John Bell, Mohammad R. Haghighat, Alberto J. Martinez, Michael P. Flynn:
An 8-Element Frequency-Selective Acoustic Beamformer and Bitstream Feature Extractor with 60 Mel-Frequency Energy Features Enabling 95% Speech Recognition Accuracy. VLSI Circuits 2020: 1-2
2010 – 2019
- 2015
- [j3]Zule Xu, Seungjong Lee, Masaya Miyahara
Sub-Picosecond Resolution and High-Precision TDC for ADPLLs Using Charge Pump and SAR-ADC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(2): 476-484 (2015) - [j2]James Lin
An Ultra-Low-Voltage 160 MS/s 7 Bit Interpolated Pipeline ADC Using Dynamic Amplifiers. IEEE J. Solid State Circuits 50(6): 1399-1411 (2015) - 2013
- [c6]James Lin
A 0.55 V 7-bit 160 MS/s interpolated pipeline ADC using dynamic amplifiers. CICC 2013: 1-4 - [c5]Zule Xu, Seungjong Lee, Masaya Miyahara, Akira Matsuzawa:
A 0.84ps-LSB 2.47mW time-to-digital converter using charge pump and SAR-ADC. CICC 2013: 1-4
2000 – 2009
- 2002
- [j1]Seungjong Lee, Ando Ki, In-Cheol Park
Interface synthesis between software chip model and target board. J. Syst. Archit. 48(1-3): 49-57 (2002)
1990 – 1999
- 1999
- [c4]You-Sung Chang, Seungjong Lee, In-Cheol Park, Chong-Min Kyung:
Verification of a Microprocessor Using Real World Applications. DAC 1999: 181-184 - 1998
- [c3]Namseung Kim, Hoon Choi, Seungjong Lee, Seungwang Lee, In-Cheol Park, Chong-Min Kyung:
Virtual Chip: Making Functional Models Work on Real Target Systems. DAC 1998: 170-173 - 1997
- [c2]Joon-Seo Yim, Chang-Jae Park, Woo-Seung Yang, Hun-Seung Oh, Hee-Choul Lee, Hoon Choi, Tae-Hoon Kim, Seungjong Lee, Nara Won, Yung-Hei Lee, In-Cheol Park
Verification methodology of compatible microprocessors. ASP-DAC 1997: 173-180 - [c1]Chong-Min Kyung, In-Cheol Park
HK386: an x86-compatible 32-bit CISC microprocessor. ASP-DAC 1997: 661-662
Coauthor Index
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