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Wenceslas Rahajandraibe
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2020 – today
- 2024
- [j39]Blaise Ravelo
, Habachi Bilal
Transient Characterization of New Low-Pass Negative Group Delay RC-Network. IEEE Trans. Circuits Syst. II Express Briefs 71(1): 126-130 (2024) - [j38]Blaise Ravelo
Luminosity Sensing Application of Negative Group Delay Predictor. IEEE Trans. Ind. Electron. 71(8): 9875-9885 (2024) - [c55]Hassen Aziza, Jérémy Postel-Pellerin, Moritz Fieback
Analysis of Conductance Variability in RRAM for Accurate Neuromorphic Computing. LATS 2024: 1-5 - [c54]Jérémy Bonnet, Stéphane Meillére, Fabien Granoux, Wenceslas Rahajandraibe:
MOS Capacitances Characterization in 28FD-SOI Technology. NewCAS 2024: 318-322 - 2023
- [j37]Blaise Ravelo
Fully Microstrip Three-Port Circuit Bandpass NGD Design and Test. IEEE Des. Test 40(1): 96-104 (2023) - [j36]Karine Coulié
Investigation of Single Event Effects in a Resistive RAM Memory Array by Coupling TCAD and SPICE Simulations. J. Electron. Test. 39(3): 275-288 (2023) - [j35]Blaise Ravelo
Low-Pass NGD Digital Circuit Application for Real-Time Greenhouse Temperature Prediction. IEEE Trans. Circuits Syst. II Express Briefs 70(9): 3709-3713 (2023) - [j34]Blaise Ravelo
All-Pass NGD FIR Original Study for Sensor Failure Detection Application. IEEE Trans. Ind. Electron. 70(9): 9561-9571 (2023) - [c53]Mathieu Guerin, Fayrouz Haddad, Md-Hossain Sazzad, Ivan Kaufmann, Christian Hedayat, Wenceslas Rahajandraibe, Rémy Vauché, Ulrich Hilleringmann:
Efficient Co-Design Methodology combinig Fast and Accurate System-level Simulations with Transistor-level Characterization. ICECS 2023: 1-4 - [c52]Koubar Gabriel, Fayrouz Haddad, Bouchra Nessakh, Wenceslas Rahajandraibe, Sawsan Sadek:
2.45GHz Low-Power Diode Bridge Rectifier Design. ICM 2023: 268-271 - 2022
- [j33]Blaise Ravelo
Original Application of Stop-Band Negative Group Delay Microwave Passive Circuit for Two-Step Stair Phase Shifter Designing. IEEE Access 10: 1493-1508 (2022) - [j32]Mathieu Guerin
Theory and Original Design of Resistive-Inductive Network High-Pass Negative Group Delay Integrated Circuit in 130-nm CMOS Technology. IEEE Access 10: 27147-27161 (2022) - [j31]Hongchuan Jia, Fayu Wan
Novel Tee-Shaped Topology Theory of Low- and High-Pass NGD Double-Type Function. IEEE Access 10: 28445-28460 (2022) - [j30]Blaise Ravelo
Design Method of Constant Phase-Shifter Microwave Passive Integrated Circuit in 130-nm BiCMOS Technology With Bandpass-Type Negative Group Delay. IEEE Access 10: 93084-93103 (2022) - [j29]Blaise Ravelo
Thermal Wave Variation Anticipation Under Minute Scale Time-Advance With Low-Pass NGD Digital Circuit. IEEE Access 10: 127654-127666 (2022) - [j28]Yajian Gan, Wenceslas Rahajandraibe, Remy Vauche, Blaise Ravelo, Nominoë Lorriere, Rachid Bouchakour:
A new method to reduce motion artifact in electrocardiogram based on an innovative skin-electrode impedance model. Biomed. Signal Process. Control. 76: 103640 (2022) - [j27]Fayu Wan
Design and Test of Innovative Three-Couplers-Based Bandpass Negative Group Delay Active Circuit. IEEE Des. Test 39(1): 57-66 (2022) - [j26]Blaise Ravelo
Design and Test of Crab-Shaped Negative Group Delay Circuit. IEEE Des. Test 39(1): 67-76 (2022) - [j25]Rémy Vauché
Bandpass NGD Time- Domain Experimental Test of Double-Li Microstrip Circuit. IEEE Des. Test 39(2): 121-128 (2022) - [j24]Sofia Fenni, Fayrouz Haddad, Antonio Jaomiary
Investigation on four-port mono-capacitor circuit with high-pass negative group delay behavior. Int. J. Circuit Theory Appl. 50(2): 478-495 (2022) - [j23]Blaise Ravelo, Wenceslas Rahajandraibe
130-nm BiCMOS design of low-pass negative group delay integrated RL-circuit. Int. J. Circuit Theory Appl. 50(6): 1876-1889 (2022) - [j22]Fayu Wan
Design and Experimentation of Inductorless Low-Pass NGD Integrated Circuit in 180-nm CMOS Technology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4965-4974 (2022) - [j21]Blaise Ravelo
Low-Pass NGD Numerical Function and STM32 MCU Emulation Test. IEEE Trans. Ind. Electron. 69(8): 8346-8355 (2022) - 2021
- [j20]Rémy Vauché
Experimental Time-Domain Study for Bandpass Negative Group Delay Analysis With Lill-Shape Microstrip Circuit. IEEE Access 9: 24155-24167 (2021) - [j19]Blaise Ravelo
Bandpass NGD TAN of Symmetric H-Tree With Resistorless Lumped-Network. IEEE Access 9: 41383-41396 (2021) - [j18]Fayu Wan
Bandpass Negative Group Delay Theory of Fully Capacitive Δ-Network. IEEE Access 9: 62430-62445 (2021) - [j17]Mathieu Guerin
Design and Synthesis of Inductorless Passive Cell Operating as Stop-Band Negative Group Delay Function. IEEE Access 9: 100141-100153 (2021) - [j16]Lili Wu
Innovative Transient Study of Tri-Bandpass Negative Group Delay Applied to Microstrip Barcode-Circuit. IEEE Access 9: 115030-115041 (2021) - [j15]Fayu Wan
Design of ₌׀₌ Shape Stub-Based Negative Group Delay Circuit. IEEE Des. Test 38(2): 78-88 (2021) - [j14]Blaise Ravelo
Resonance Effect Reduction With Bandpass Negative Group Delay Fully Passive Function. IEEE Trans. Circuits Syst. II Express Briefs 68(7): 2364-2368 (2021) - [c51]Hassen Aziza, Karine Coulié, Wenceslas Rahajandraibe:
Design Considerations Towards Zero-Variability Resistive RAMs in HRS State. LATS 2021: 1-5 - [c50]Karine Coulié, Hassen Aziza, Wenceslas Rahajandraibe
Investigation of Single Event Effects in a Resistive RAM memory array by SPICE level simulation. LATS 2021: 1-6 - 2020
- [j13]Blaise Ravelo
Negative Group Delay Theory on Li Topology. IEEE Access 8: 47596-47606 (2020) - [j12]Blaise Ravelo, Wenceslas Rahajandraibe
Reconstruction Technique of Distorted Sensor Signals With Low-Pass NGD Function. IEEE Access 8: 92182-92195 (2020) - [j11]Fayu Wan
0IO-Shape PCB Trace Negative Group-Delay Analysis. IEEE Access 8: 97707-97717 (2020) - [j10]Blaise Ravelo
Innovative Theory of Low-Pass NGD via-Hole-Ground Circuit. IEEE Access 8: 130172-130182 (2020) - [j9]Rivo Randriatsiferana
Zonal Thermal Room Original Model With Kron's Method. IEEE Access 8: 174893-174909 (2020) - [j8]Blaise Ravelo
Original Theory of NGD Low Pass-High Pass Composite Function for Designing Inductorless BP NGD Lumped Circuit. IEEE Access 8: 192951-192964 (2020) - [j7]Fayu Wan
NGD Analysis of Turtle-Shape Microstrip Circuit. IEEE Trans. Circuits Syst. 67-II(11): 2477-2481 (2020) - [j6]Ehsan Ali
Autonomous Event Driven Model of Second Order Voltage Switched Charge Pump PLL. IEEE Trans. Circuits Syst. 67-II(12): 2903-2907 (2020) - [c49]S. Fenni, Fayrouz Haddad, S. A. Tedjini, Abdelhalim Slimane, Wenceslas Rahajandraibe, Rachida Touhami:
Ultra-low power 2.4 GHz Self Oscillating Mixer using a load-tolerant VCO. DTIS 2020: 1-5 - [c48]Remy Vauche, Zineb Benjelloun, Rym Assila Belhadj Mefteh, Wenceslas Rahajandraibe
Design and Analysis of a Gilbert Analog Multiplier for Input Dynamic Range optimization. DTIS 2020: 1-6
2010 – 2019
- 2019
- [j5]Imen Ghorbel
Design Methodology of Ultra-Low-Power LC-VCOs for IoT Applications. J. Circuits Syst. Comput. 28(7): 1950122:1-1950122:16 (2019) - [c47]Fayrouz Haddad, Wenceslas Rahajandraibe, Imen Ghorbel:
Compact RF CMOS 4-bit Digitally Controlled Oscillator. ICECS 2019: 378-381 - 2018
- [c46]Fayrouz Haddad, Imen Ghorbel, Wenceslas Rahajandraibe, Mourad Loulou, Abdelhalim Slimane:
Current-reuse RF LC-VCO Design for Autonomous Connected Objects. ICECS 2018: 473-476 - [c45]Yajian Gan, Remy Vauche, Jean-François Pons, Wenceslas Rahajandraibe
Dry Electrode Materials for Electrocardiographic Monitoring. ICECS 2018: 645-646 - [c44]Imen Ghorbel, Fayrouz Haddad, Wenceslas Rahajandraibe, Mourad Loulou:
A subthreshold low-power NMOS LC-VCO Design for Autonomous Connected Objects. ICM 2018: 216-219 - [c43]Hassen Aziza, Karine Coulié, Wenceslas Rahajandraibe
Using short-term fourier transform for particle detection and recognition in a CMOS oscillator-based chain. LATS 2018: 1-5 - 2017
- [c42]Fayrouz Haddad, Imen Ghorbel, Wenceslas Rahajandraibe
Multi-band inductor-less VCO for IoT applications. ISCAS 2017: 1-4 - 2016
- [j4]Karine Coulié-Castellani, Wenceslas Rahajandraibe
Optimization of a Particles Detection Chain Based on a VCO Structure. J. Electron. Test. 32(1): 21-30 (2016) - [j3]Ehsan Ali, Christian Hangmann, Christian Hedayat, Fayrouz Haddad, Wenceslas Rahajandraibe
Event Driven Modeling and Characterization of the Second Order Voltage Switched Charge Pump PLL. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(3): 347-358 (2016) - [c41]Zineb Benjelloun, Rémy Vauché, Wenceslas Rahajandraibe
Design of an energy detector for heartbeat localization in ECG signals. ICECS 2016: 73-76 - 2015
- [j2]Nicolas Borrel, Clement Champeix, Edith Kussener, Wenceslas Rahajandraibe
Electrical model of an inverter body-biased structure in triple-well technology under pulsed photoelectric laser stimulation. Microelectron. Reliab. 55(9-10): 1592-1599 (2015) - [c40]Nicolas Borrel, Clement Champeix, Edith Kussener, Wenceslas Rahajandraibe
Influence of triple-well technology on laser fault injection and laser sensor efficiency. DFTS 2015: 85-90 - [c39]Imen Ghorbel, Fayrouz Haddad, Hervé Barthélemy, Wenceslas Rahajandraibe
Design and implementation of an inductorless digitally controlled oscillator based on CMOS inverters. ICECS 2015: 559-562 - [c38]Nicolas Borrel, Clement Champeix, Mathieu Lisart, Alexandre Sarafianos, Edith Kussener, Wenceslas Rahajandraibe
Electrical model of an NMOS body biased structure in triple-well technology under photoelectric laser stimulation. IRPS 2015: 1 - [c37]Fayrouz Haddad, Wenceslas Rahajandraibe
Design of an optimal layout RF passive polyphase filter for large image rejection. ISCAS 2015: 269-272 - [c36]Ehsan Ali, Wenceslas Rahajandraibe
Simulation and validation of arbitrary ordered VSCP-PLLs using event-driven macromodeling. ISCAS 2015: 878-881 - [c35]Karine Coulié-Castellani, Wenceslas Rahajandraibe, Hassen Aziza, Jean-Michel Portal, Gilles Micolau:
Improvement of a detection chain based on a VCO concept for microelectronic reliability under natural radiative environment. LATS 2015: 1-5 - [c34]Wenceslas Rahajandraibe
Low cost built-in-tuning of on-chip passive filters for low-if double quadrature rf receiver. LATS 2015: 1-4 - [c33]Ehsan Ali, Wenceslas Rahajandraibe
Exact and approximated discrete-time non-linear models of voltage switched CP-PLL. MWSCAS 2015: 1-4 - [c32]Ehsan Ali, Wenceslas Rahajandraibe
Modeling & PVT characterization of arbitrary ordered VSCP-PLL using an efficient event-driven approach. NEWCAS 2015: 1-4 - [c31]Imen Ghorbel, Fayrouz Haddad, Wenceslas Rahajandraibe
Ultra low power RF cross-coupled VCO design in the subthreshold regime with high immunity to PVT variations in 130nm CMOS technology. NEWCAS 2015: 1-4 - 2014
- [j1]Wenceslas Rahajandraibe
Low Power Radio Frequency Transceiver with Built-In-Tuning of the Local Oscillator for Open Loop Modulation. J. Low Power Electron. 10(1): 173-181 (2014) - [c30]Eric Savary, Wenceslas Rahajandraibe
High resolution NEMS smart audio sensor based on resistive silicon nano wires for hearing aids. ICECS 2014: 558-561 - [c29]S. Ben Krit, Karine Coulié-Castellani, Wenceslas Rahajandraibe, Gilles Micolau, A. Lyoussi:
Investigations of margins for the interplay using a digital testing tool dedicated to neutrons discrimination. ICECS 2014: 806-809 - [c28]Imen Ghorbel, Fayrouz Haddad, Wenceslas Rahajandraibe:
Optimization of voltage-controlled oscillator VCO using current-reuse technique. ICM 2014: 212-215 - [c27]Karine Coulié-Castellani, Wenceslas Rahajandraibe, Gilles Micolau, Hassen Aziza, Jean-Michel Portal:
Improvement of a VCO concept for low energy particule detection and recognition. LATW 2014: 1-4 - [c26]S. Ben Krit, Wenceslas Rahajandraibe, Karine Castellani-Coulié, Gilles Micolau, Alexandre Levisse, A. Lyoussi:
Development of a digital tool for the simulation of a readout system dedicated for neutrons discrimination. LATW 2014: 1-6 - [c25]Ehsan Ali, Wenceslas Rahajandraibe
Simulations of 3rd order voltage switched CP-PLL using a fast event switching macromodeling. MWSCAS 2014: 491-494 - 2013
- [c24]Jamel Nebhen
Low-noise CMOS analog-to-digital interface for MEMS resistive microphone. ICECS 2013: 445-448 - [c23]Fayrouz Haddad, Wenceslas Rahajandraibe, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal, Jamel Nebhen
Low-cost auto-calibration of passive polyphase filter in image reject receiver. ICECS 2013: 699-702 - [c22]Karine Castellani-Coulié, Marc Bocquet, Hassen Aziza, Jean-Michel Portal, Wenceslas Rahajandraibe
SPICE level analysis of Single Event Effects in an OxRRAM cell. LATW 2013: 1-5 - [c21]Wenceslas Rahajandraibe
Built-in tuning of the local oscillator for open loop modulation of low cost, low power RF transceiver. LATW 2013: 1-4 - [c20]Ehsan Ali, Wenceslas Rahajandraibe
Simulative characterization of the stability for second order voltage switched CP-PLL. MWSCAS 2013: 153-156 - [c19]Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour:
DCG-FGT transistor: Retention study of Floating Gate charge. MWSCAS 2013: 825-827 - [c18]Fayrouz Haddad, Wenceslas Rahajandraibe
On the investigation of built-in tuning of RF receivers using on-chip polyphase filters. VTS 2013: 1-6 - 2012
- [c17]Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour:
PSP based DCG-FGT transistor Model: Full characterization procedure. ISCIT 2012: 222-227 - [c16]Karine Castellani-Coulié, Hassen Aziza, Wenceslas Rahajandraibe, Gilles Micolau, Jean-Michel Portal:
Investigation of a CMOS oscillator concept for particle detection and diagnosis. LATW 2012: 1-5 - [c15]Fayrouz Haddad, Wenceslas Rahajandraibe, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal:
Built-in tuning of RFIC Passive Polyphase Filter by process and thermal monitoring. LATW 2012: 1-5 - [c14]Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour:
A new adustable Schmitt Trigger based on Dual Control Gate-Floating Gate Transistor (DCG-FGT). MWSCAS 2012: 643-645 - 2011
- [c13]Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour:
PSP based DCG-FGT transistor model including characterization procedure. ICECS 2011: 228-231 - [c12]J. Bouloc, L. Nony, C. Loppacher, Wenceslas Rahajandraibe, F. Bocquet, Lakhdar Zaïd:
FPGA-based programmable digital PLL with very high frequency resolution. ICECS 2011: 370-373 - [c11]Anass Samir, Edith Kussener, Wenceslas Rahajandraibe
A 90-nm CMOS resistor-free compact trimmable voltage reference for ultra-low power low cost applications. ICECS 2011: 661-664 - [c10]Lakhdar Zaïd, J. Bouloc, A. Sangiovanni, Fayrouz Haddad, Wenceslas Rahajandraibe, Vincent Cheynet de Beaupré, R. Scali:
A low-cost 2.45-GHz frequency synthesizer with open-loop modulation for WPAN applications. PIMRC 2011: 874-878 - 2010
- [c9]Hervé Barthélemy, Edith Kussener, Sylvain Bourdel, Wenceslas Rahajandraibe
Frequency down-conversion with complementary-MOS inverters. ICECS 2010: 49-52 - [c8]Fayrouz Haddad, Wenceslas Rahajandraibe
Design of fully-integrated RF front-end for large image rejection and wireless communication applications. ICECS 2010: 902-905
2000 – 2009
- 2009
- [c7]Fayrouz Haddad, Wenceslas Rahajandraibe
Radio frequency tunable polyphase filter design. ICECS 2009: 21-24 - 2007
- [c6]Wenceslas Rahajandraibe, Lakhdar Zaïd, Vincent Cheynet de Beaupré, Julien Roche:
Low-Gain-Wide-Range 2.4-GHz Phase Locked Loop. ICECS 2007: 26-29 - [c5]Fayrouz Haddad, Rachid Bouchakour, Wenceslas Rahajandraibe, Lakhdar Zaïd, Oussama Frioui:
Radio Frequency Polyphase Filter Design in 0.13-μm CMOS for Wireless Communications. ICECS 2007: 833-836 - [c4]Oussama Frioui, Lakhdar Zaïd, Wenceslas Rahajandraibe
A 2.4 GHz Very Low Phase Noise Fully Integrated Quadrature LC Oscillator. ICECS 2007: 1095-1098 - 2006
- [c3]Vincent Cheynet de Beaupré, Lakhdar Zaïd, Wenceslas Rahajandraibe, Gilles Bas:
A Fully Integrated 2.45-GHz Frequency Synthesizer and FSK Modulator. ICECS 2006: 1208-1211 - 2005
- [c2]Vincent Cheynet de Beaupré, Wenceslas Rahajandraibe, Lakhdar Zaïd, Gilles Bas:
A CMOS 2.45-GHz ring oscillator with temperature compensation. ICECS 2005: 1-4 - 2002
- [c1]Wenceslas Rahajandraibe
Test Structure for IC(VBE) Parameter Determination of Low Voltage Applications. DATE 2002: 316-321
Coauthor Index
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last updated on 2024-10-02 21:37 CEST by the dblp team
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