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Hui Yan Cheah
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2010 – 2019
- 2016
- [b1]Hui Yan Cheah:
The iDEA architecture-focused FPGA soft processor. Nanyang Technological University, Singapore, 2016 - [c7]Ze-ke Wang, Hui Yan Cheah, Johns Paul, Bingsheng He, Wei Zhang:
Accelerating Database Query Processing on OpenCL-based FPGAs (Abstract Only). FPGA 2016: 274 - [c6]Ze-ke Wang, Johns Paul, Hui Yan Cheah, Bingsheng He
, Wei Zhang:
Relational query processing on OpenCL-based FPGAs. FPL 2016: 1-10 - 2015
- [c5]Hui Yan Cheah, Suhaib A. Fahmy, Nachiket Kapre:
On Data Forwarding in Deeply Pipelined Soft Processors. FPGA 2015: 181-189 - 2014
- [j2]Hui Yan Cheah, Fredrik Brosser, Suhaib A. Fahmy
The iDEA DSP Block-Based Soft Processor for FPGAs. ACM Trans. Reconfigurable Technol. Syst. 7(3): 19:1-19:23 (2014) - [c4]Hui Yan Cheah, Suhaib A. Fahmy
Analysis and optimization of a deeply pipelined FPGA soft processor. FPT 2014: 235-238 - 2013
- [j1]Sunita Chandrasekaran, Shilpa Shanbagh, Ramkumar Jayaraman, Douglas L. Maskell, Hui Yan Cheah:
C2FPGA - A dependency-timing graph design methodology. J. Parallel Distributed Comput. 73(11): 1417-1429 (2013) - [c3]Fredrik Brosser, Hui Yan Cheah, Suhaib A. Fahmy
Iterative floating point computation using FPGA DSP blocks. FPL 2013: 1-6 - 2012
- [c2]Hui Yan Cheah, Suhaib A. Fahmy
A lean FPGA soft processor built using a DSP block. FPGA 2012: 237-240 - [c1]Hui Yan Cheah, Suhaib A. Fahmy
iDEA: A DSP block based FPGA soft processor. FPT 2012: 151-158
Coauthor Index
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