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Jian Yan 0002
Person information
- affiliation: Fudan University, State Key Laboratory of ASIC and System, Shanghai, China
Other persons with the same name
- Jian Yan 0001 — Tsinghua University, Space Center, Beijing, China (and 1 more)
- Jian Yan 0003 — Shanghai Jiao Tong University, Department of Automation / MoE Key Laboratory of System Control and Information Processing, China
- Jian Yan 0004 — Communication University of China, School of Computer, Beijing, China
- Jian Yan 0005 — Northeastern University, College of Computer Science and Engineering, Shenyang, China
- Jian Yan 0006 — Chinese Academy of Science, Institute of Information Engineering, Beijing, China
- Jian Yan 0007 — Xi'an Shiyou University, School of Petroleum Engineering, China (and 1 more)
- Jian Yan 0008 — Science and Technology on Electronic Information Control Laboratory, Chengdu, China
- Jian Yan 0009 — Nanjing University of Science and Technology, School of Computer Science and Engineering, China
- Jian Yan 0010 — Huawei Technologies Co. Ltd, Nanjing, China
- Jian Yan 0011 — Chinese Academy of Sciences, Aerospace Information Research Institute, Beijing, China
- Jian Yan 0012 — Chongqing Three Gorges Vocational College, School of Automotive Engineering, China
- Jian Yan 0013 — Hefei SENS Power Semiconductor Co. Ltd, China
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2010 – 2019
- 2017
- [j2]Jian Yan, Junqi Yuan, Philip Heng Wai Leong, Wayne Luk, Lingli Wang:
Lossless Compression Decoders for Bitstreams and Software Binaries Based on High-Level Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 25(10): 2842-2855 (2017) - 2015
- [c4]Jian Yan, Jifang Jin, Ying Wang, Xuegong Zhou, Philip H. W. Leong, Lingli Wang:
UniStream: A unified stream architecture combining configuration and data processing. FPL 2015: 1-4 - [c3]Jifang Jin, Jian Yan, Xuegong Zhou, Lingli Wang:
An adaptive cross-layer fault recovery solution for reconfigurable SoCs. FPT 2015: 188-191 - 2014
- [c2]Jian Yan, Junqi Yuan, Ying Wang, Philip H. W. Leong, Lingli Wang:
Design space exploration for FPGA-based hybrid multicore architecture. FPT 2014: 280-281 - 2013
- [j1]Ying Wang, Xuegong Zhou, Lingli Wang, Jian Yan, Wayne Luk, Chenglian Peng, Jiarong Tong:
SPREAD: A Streaming-Based Partially Reconfigurable Architecture and Programming Model. IEEE Trans. Very Large Scale Integr. Syst. 21(12): 2179-2192 (2013) - 2012
- [c1]Ying Wang, Jian Yan, Xuegong Zhou, Lingli Wang, Wayne Luk, Chenglian Peng, Jiarong Tong:
A partially reconfigurable architecture supporting hardware threads. FPT 2012: 269-276
Coauthor Index
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