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Jens Schönherr
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2010 – 2019
- 2013
- [j3]Thomas Klotz, Jens Schönherr, Norman Seßler, Bernd Straube, Karsten Turek:
Automated Formal Verification of Routing in Material Handling Systems. IEEE Trans Autom. Sci. Eng. 10(4): 900-915 (2013) - 2012
- [c14]Thomas Klotz, Norman Seßler, Bernd Straube, Eva Fordran, Karsten Turek, Jens Schönherr:
On the formal verification of routing in material handling systems. CASE 2012: 8-13 - [c13]Thomas Klotz, Norman Seßler, Bernd Straube, Eva Fordran, Karsten Turek, Jens Schönherr:
Compositional verification of material handling systems. ETFA 2012: 1-8 - 2010
- [c12]Jens Schönherr:
Abstracting from Register-Transfer to Algorithmic Level for Verification. MBMV 2010: 147-156
2000 – 2009
- 2009
- [c11]Jens Schönherr:
Ein gemeinsamer Ansatz für die formale und simulative Verifikation digitaler Schaltungsdesigns. MBMV 2009: 37-46 - 2008
- [j2]Jens Schönherr, Martin Freibothe, Bernd Straube, Jörg Bormann:
Semi-formal verification of the steady state behavior of mixed-signal circuits by SAT-based property checking. Theor. Comput. Sci. 404(3): 293-307 (2008) - 2007
- [c10]Jens Schönherr:
Ein Schritt zur formalen Verifikation auf der Transaktionsebene. MBMV 2007: 213-222 - 2005
- [c9]Martin Freibothe, Jens Schönherr, Bernd Straube:
Formal Verification of the Quasi-Static Behavior of Mixed-Signal Circuits by Property Checking. FAC 2005: 23-35 - 2004
- [c8]Martin Freibothe, Jens Schönherr, Bernd Straube, Jörg Bormann:
Semi-formal Verification of the quasi-static behavior of Mixed-Signal Circuits by SAT-based Property Checking. ISoLA (Preliminary proceedings) 2004: 181-187 - 2000
- [c7]Sergej Sawitzki, Rainer G. Spallek, Jens Schönherr, Bernd Straube:
Formal Verification for Microprocessors with Extendable Instruction Set. ASAP 2000: 47-55 - [c6]Jens Schönherr, Bernd Straube:
Automatic Equivalence Check of Circuit Descriptions at Clocked Algorithmic and Register Transfer Level. DATE 2000: 759 - [c5]Sergej Sawitzki, Jens Schönherr, Rainer G. Spallek, Bernd Straube:
Formal Verification of a Reconfigurable Microprocessor. FPL 2000: 781-784 - [c4]Jens Schönherr, Bernd Straube:
Induction based Equivalence Check at Register Transfer Level. MBMV 2000: 37-44 - [c3]Jens Schönherr, Bernd Straube:
Formale Verifikation auf höheren Entwurfsebenen mittels symbolischer Traversierung unendlicher Automaten. MBMV 2000: 47-56
1990 – 1999
- 1999
- [c2]Jens Schönherr, Ingo Schreiber, Eva Fordran, Bernd Straube:
Hazard Checking in Pipelined Processor Designs Using Symbolic Model Checking. EUROMICRO 1999: 1075- - 1998
- [c1]Ingo Schreiber, Jens Schönherr, Eva Fordran, Klaus Schneider, Bernd Straube:
Kontrollfluss-Verifikation von Algorithmen mittels Modellprüfung. MBMV 1998: 114-123 - 1993
- [j1]Jens Schönherr:
Smooth biarc curves. Comput. Aided Des. 25(6): 365-370 (1993)
Coauthor Index
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